M. Acken and S. Millman, "Fault model evolution for diagnosis: Accuracy vs. precision," in Proc. IEEE Custom Integrated Circuits Conf., 1992, pp. 13.4.1--13.4.4.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....different thresholds, but each input of a gate has a different threshold. This implies that two gates tied to the same bridged node can interpret the voltage at the bridged node as different logical values, as shown in an example in [8] This problem is called The Byzantine General s Problem [14]. A bridging fault model should also consider the resistance of the bridge, because it is unrealistic to assume that all bridges between gate outputs are pure shorts. 2 2.1 Previous fault models A number of bridging fault models have been proposed in previous work, like the wired AND, wired OR ....

J.M. Acken and S.D. Millman, "Fault Model Evolution for Diagnosis: Accuracy vs. Precision," in Proc. IEEE Custom Integrated Circuits Conf., 1992, pp. 13.4.1-13.4.4.

....behavior. This is because the logical interpretation of the voltage at the bridged nodes depends on the logical threshold of the gate to which the bridged node is connected. In reality, not only do different gates have different thresholds, but each input of a gate has a different threshold [6][7]. It is well known that the stuck at fault model is inadequate for modeling bridging faults [8] 9] Many models have been developed for bridging faults [6] 10] 11] 12] 13] 14] 15] 16] Most of these fault models assume a zero ohm bridge resistance, but several models assume a resistive bridge ....

J. M. Acken and S. D. Millman, "Fault Model Evolution for Diagnosis: Accuracy vs. Precision," IEEE Custom Int. Circ. Conf., 1992, pp. 13.4.1-13.4.4.

....to come in future, e.g. migration of metal to the surrounding areas over time and shortening the life and reliability of a chip [2] 1. 2 Related Works Most methods tried to improve the accuracy of their fault modeling by using an approximation method at the gate level such as a voting model [9] [10] Although these methods are very fast, their accuracies are not acceptable, because they only analyze the bridge output voltages without carefully considering how the faults propagate [11] The performance of the switch level tools such as SWITEST [12] or the analog simulators like SPICE [6] ....

M. Acken and S. Millman, "Fault Model Evolution for Diagnosis: Accuracy vs. Precision," Proc. of IEEE Custom Integrated Circuits Conf., pp. 13.4.1-13.4.4, 1992.

....incorrect diagnoses might occur if the logic threshold values for gates driven by the output of one of the two bridged gates are not the same and if the logic levels for these gates are therefore interpreted di#erently. This scenario is referred to as the Byzantine Generals Problem [10] 11] [12]. An alternative approach for fault diagnosis is to perform diagnostic fault simulation using information from the tester about failing outputs. This approach has been used in the past for single stuck at faults [13] During fault simulation, the actual output response of a failing device is ....

J. M. Acken and S. D. Millman, "Fault model evolution for diagnosis: Accuracy vs. precision," Proc. Custom Integrated Circuits Conf., 1992.

....accuracy of the model is 9 called into question. In this case a precise operating point must be determined, so the voting model might not be appropriate. An example of where this becomes important was identified by Acken and Millman as the Byzantine Generals Problem applied to bridge faults[AM92] It was noted that in CMOS circuits, different downstream (fanout) gates can form different digital interpretations of the same analog bridge voltage, based on varying gate input thresholds. These input thresholds can be characterized per cell and per cell input, and the input thresholds of the ....

J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. In Proceedings of the Custom Integrated Circuits Conference, 1992.

.... bridging faults 34 is two component simulation, in which the gates driving the bridged nodes are SPICE simulated to determine the bridge voltage, which is then compared against the SPICEcomputed logic thresholds of downstream gates in order to model the effect of the Byzantine Generals Problem [2, 3]. The simulator also extensively models feedback bridging faults. If a feedback bridging fault evidences the potential to oscillate or hold state, the simulator forces the bridge voltage to be the fault free value on the rear bridged node, thereby disallowing oscillation. Because the faulty ....

J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. Proceedings of the Custom Integrated Circuits Confernce, 1992.

.... voting model or an analog circuit analysis might be used to determine a more accurate Primitive Bridge Function [2, 3, 4] It is possible that the inputs being driven by the bridged node may interpret the bridged voltage as different logic values because of different logic thresholds at the inputs [5]. This paper explores the case where this factor does not contribute to the final outcome and the PBF can be determined by circuit simulating only two components. A combinational test for a bridge fault shares the same basic characteristics as the test for a stuck at fault. To introduce a ....

J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. In Proceedings of the Custom Integrated Circuits Conference, 1992.

.... [AM91, FL91, MG91] In fact, the actual CMOS behavior is far enough from wiredlogic, that we must deal with voltages all the way from power to ground including voltages that may be interpreted by some gate inputs as a logic 0 and some as a logic 1; this is known as the Byzantine Generals problem [AM92]. The wired logic model (wired AND or wired OR) is the easiest model to implement for simulation and test pattern generation. It has the benefit of speed; the wired logic model closely resembles the single stuck at fault model with a few additional constraints [AM85] The wired logic model assumes ....

....gray region left by the pessimistic model, it is necessary to take additional circuit information into account. Depending on the input thresholds of the downstream components, a voltage in the gray region may be interpreted as different logic values: this is known as the Byzantine Generals problem [AM92]. We can address the Byzantine Generals problem by characterizing cell inputs and assigning analog input threshold values, which can then be compared to the analog bridge value to determine the behavior of the downstream gates. This technique for simple threshold determination has been implemented ....

[Article contains additional citation context not shown here]

J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. In Proceedings of the Custom Integrated Circuits Conference, 1992.

....PBF generator. We present these next and show afterward why neither of them should significantly affect the results shown later in this paper. One potential inaccuracy is the lack of a specific threshold voltage for converting the voltages derived from analog simulation to logic values for the PBF [3]. Gates, and even different inputs to the same gate, have different logic threshold values. The lowest input threshold we have found in the MCNC cell library is 1.8 volts; the highest input threshold is 2.8 volts. The largest threshold range for different inputs to a single gate is 0.68 volts. The ....

J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. In Proceedings of the Custom Integrated Circuits Conference, 1992.

.... trials simulated and diagnosed the top 10 of realistic bridging faults (from 160 for the C432 to 5379 for the C7552) Carafe [12] identified the most likely bridging faults, and our fault simulator, Nemesis, simulated them (taking into account the Byzantine Generals Problem for bridging faults [1]) We then ran these simulated bridging fault behaviors through a standard stuck at fault diagnosis procedure. Different weightings of misprediction and nonprediction penalties were used; Table 1 reports the results from the most successful equal weightings. The ten candidates with the lowest ....

J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. Proceedings of the Custom Integrated Circuits Conference, pages 13.4.1--13.4.4, 1992.

....subject to interpretation as different logic values by downstream logic gates. Because gate input logic thresholds are not identical, different downstream gates can interpret the voltage as different logic values: this phenomenon is known as the Byzantine Generals Problem [29] for bridging faults [3, 4]. Figure 2 shows a simple example of voltage interpretation in the presence of variable logic thresholds. This behavior has important implications for diagnosis: the propagation conditions for the error induced by a bridging fault are not necessarily the same as those caused by a stuck at fault. ....

J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. Proceedings of the Custom Integrated Circuits Conference, 1992.

....of the correct candidate, the candidate will no longer match and the diagnosis will fail. Our technique was highly successful at diagnosing bridging behaviors. However, variable logic thresholds downstream from the fault site (also known as the Byzantine Generals Problem for bridging faults [1, 2]) caused the diagnosis procedure to provide no candidate faults (an empty diagnosis) roughly ten percent of the time. The Byzantine Generals Problem is only the first of numerous details that can affect the behavior of real bridges. 2.2 Bridging Fault Modeling Predicting the behavior of bridging ....

.... Millmandemon2 strated that wired logic is a poor predictor of CMOS bridge behavior and suggested the voting model to take into account variable drive strengths in CMOS logic gates [1] However, they pointed out that their method did not address the Byzantine Generals Problem for bridging faults [2]. Maxwell and Aitken suggested biased voting as a solution to the Byzantine Generals Problem [19] but biased voting fails to simulate all the repercussions of feedback bridging faults, and it fails to take into account input logic thresholds more than one level away from the fault site. ....

J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. Proceedings of the Custom Integrated Circuits Conference, pages 13.4.1--13.4.4, 1992.

....the gate level methods have the following problems: 1. The circuit need to be structurally altered for each BF which can be expensive for large circuits with a large number of BFs. 2. An intermediate cell output voltage can be interpreted differently (as logic 1 or 0) by different fanout cells[7, 8], and this Byzantine General s Problem cannot be handled by gate level approaches. 3. Only routing(external) BFs can be handled since the gate internal information is opaque to the gate level simulators. Switch level simulators[9, 10, 11] model a BF as a permanent conducting transistor. They are ....

J. M. Acken and S. D. Millman, "Fault model evolution for diagnosis: accuracy vs. precision," IEEE Custom Integrated Circuit Conference (CICC), pp. 13.4.1--13.4.4, 1992.

....For large circuits with huge numbers of BFs, this approach may not be applicable. In general, gate level approaches cannot properly handle the Byzantine General s Problem where an intermediate cell output voltage can be interpreted differently (as logic 1 or 0) by different fanout cells[15, 16]. In addition, they can only simulate routing BFs since no information internal to the gate cells is available to the simulator. Switch level simulators[17, 18, 19] model a BF as a permanent conducting transistor. They are applicable if the BFs can be modeled as transistors with allowable strength ....

J. M. Acken and S. D. Millman, "Fault model evolution for diagnosis: accuracy vs. precision," IEEE Custom Integrated Circuit Conference (CICC), pp. 13.4.1--13.4.4, 1992.

....is subject to interpretation as variable logic values by downstream logic gates. Because gate input logic thresholds are not identical, different downstream gates can interpret the voltage as different logic values: This phenomenon is known as the Byzantine Generals Problem for bridging faults [1, 2]. Figure 1 shows a simple example of voltage interpretation in the presence of variable logic thresholds. threshold: 2.4 V 2.5 V logic 1 logic 1 logic 0 logic 0 B A C threshold: 2.6 V Figure 1: An instance of the Byzantine Generals Problem for bridging faults. Each gate interprets the voltage as a ....

J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. Proceedings of the Custom Integrated Circuits Confernce, 1992.

....the bridge as shown in the shaded region in Figure 1 (a) The logic gates downstream from the bridged nodes can have variable input logic thresholds. Thus the intermediate voltage at a bridged node may be interpreted differently by different gates. This is known as the Byzantine Generals Problem [2, 3] and is illustrated in Figure 1 (b) The voltage at the node A ( VA ) is interpreted as a faulty value (0) by gate d and a good value (1) by gate c. Thus, different branches from a single fanout stem can have different logic values. The feasibility of any diagnosis scheme can be evaluated using ....

J. M. Acken and S. D. Millman, "Fault Model Evolution for Diagnosis: Accuracy vs. Precision," in Proc. of the Custom Integrated Circuits Conf., pp. 13.4.1--13.4.4, 1992.

....behavior induced by the fault extends for a certain distance beyond the fault site, after which the circuit behavior is digitally resolvable. The idea that a bridge voltage can be interpreted differently by different downstream gates is known as the Byzantine Generals Problem for bridging faults [5]. The EPROOFS simulator [14] implements this via mixed mode simulation, where a SPICE like analog simulation of the region around the fault site is incorporated into a digital simulation of the rest of the circuit. This method provides correct answers when previous models might have failed, in ....

....the bridge to create the PBF is known as two component simulation. Depending on the accuracy required, the fault block may actually have to replace more than two components; it may need to include downstream gates in order to make sure that the outputs of the fault block are digitally resolved [5]. Two component simulation can also model arbitrary bridge resistance values by treating discrete bridge resistances as separate faults. For bridging faults that do not introduce any feedback, the output of the PBF is computed with wire values from the fault free circuit. As presented in the next ....

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J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. In Proceedings of the Custom Integrated Circuits Conference, 1992.

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M. Acken and S. Millman, "Fault model evolution for diagnosis: Accuracy vs. precision," in Proc. IEEE Custom Integrated Circuits Conf., 1992, pp. 13.4.1--13.4.4.

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J. M. Acken and S. D. Millman. Fault model evolution for diagnosis: Accuracy vs precision. In Proceedings of the Custom Integrated Circuits Conference, 1992.

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Acken, J.M., and S.D. Millman, "Fault Model Evolution for Diagnosis: Accuracy vs. Precision," Proc. of 1992 Custom Integrated Circuits' Conference, pp. 13.4.1-13.4.4, 1992.

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