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Moyer-S, "Access Ordering Algorithms for a Single Module Memory", University of Virginia, IPC-TR-92-002, 1992.

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This paper is cited in the following contexts:
Access Ordering Algorithms for a Multicopy Memory - Moyer (1992)   (1 citation)  (Correct)

....as noted by Lam et al. [LaRW91] while data caches have been demonstrated to be effective for general purpose applications. their effectiveness for numerical code has not been established . 1. 1 Background This work builds on previous analytic results derived for a single module memory system [Moye92a]. To make this document self contained, the necessary analysis from that report is repeated here. Readers familiar with previous work may skip immediately to the analysis of a multicopy architecture presented in section 5; note: there is an important addition to the MAP access sequence definition ....

Moyer-S, "Access Ordering Algorithms for a Single Module Memory", University of Virginia, IPC-TR-92-002, 1992.


Access Ordering Algorithms for an Interleaved Memory - Moyer (1992)   (2 citations)  (Correct)

....are developed for a sequentially interleaved memory architecture. Interleaving is the most prevalent parallel memory storage scheme whereby for an m module system, word a maps to module . 1. 1 Background This work builds on previous analytic results derived for a single module memory system [Moye92a]. To make this document self contained, the necessary analysis from that report is repeated here. Readers familiar with previous work may skip immediately to the analysis of an interleaved architecture presented in section 5; note: there is an important addition to the MAP access sequence ....

Moyer-S, "Access Ordering Algorithms for a Single Module Memory", University of Virginia, IPC-TR-92-002, 1992.


Compiling for Efficient Memory Utilization - McKee (1996)   (1 citation)  (Correct)

....data from main memory to registers, to cache, or to special hardware buffers (or vice versa) For instance, Moyer introduces static access ordering to maximize effective bandwidth for non caching register loads. He derives his algorithms relative to a precise analytic model of memory systems [Moy92a,Moy92b,Moy92c,Moy93]. Since the best ordering cannot be determined without address alignment information that is not generally available at compile time, these formulas calculate an ordering that is probabilistically optimal. They do this by minimizing the word access overhead (for wide word accesses) 1 and the ....

S.A. Moyer, "Access Ordering Algorithms for a Single Module Memory", University of Virginia Institute for Parallel Computation, Report IPC-92-02, December 1992.

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