| J.B. Chen. The Impact of Software Structure and Policy on CPU and Memory System Performance. Ph.D. Thesis, published as technical report CMU-CS-94-145 from Carnegie Mellon University. |
....program which frequently alternate are placed at addresses which do not conflict in the cache. Modifying any part of the program can shift large parts of the rest of the program around in memory, and thus have a large effect on performance even if the modified function itself is never used. Chen [6] measured memory system behaviour under variants of the Mach operating system, and showed that it is strongly affected by page mapping policy. On the machines under study, page mapping affected performance by changing the way memory locations conflict in the second level cache. Chen s work ....
....the router buffer size of one packet. Much larger variations are demonstrated in chapter 5. Sensitivity analysis, while considered essential in some fields, is rarely performed for compiler network performance measurement (the author has never found a published example thereof. 15 Both Chen s [6] and Quong s [19] results suggest that memory layout could have a large effect on system performance larger than the improvements reported for many new optimizations. Thus, it is clear that this phenomenon should be explored and quantified. This is done in chapter 4, both for compiler systems ....
[Article contains additional citation context not shown here]
J.B. Chen. The Impact of Software Structure and Policy on CPU and Memory System Performance. Ph.D. Thesis, published as technical report CMU-CS-94-145 from Carnegie Mellon University.
....models (such as sequential, weak, release, lazy) for various processor and network configurations and compared their performance. Compared Mach 3.0 and Ultrix and found that, for similar functions, Mach executes more instructions, and each incurs a higher memory cost due to caching effects. Chen 94a] Developed WAX, a failure resilient programming environment for parallel distributed systems, and used it to implement several applications. CARNEGIE MELLON UNIVERSITY FINAL REPORT 1990 93 RELATED STUDIES AND SERVICES 7 8 Technology Transfer Another goal of the Mach project was to enable ....
Chen, J.B. The Impact of Software Structure and Policy on CPU and Memory System Performance. PhD thesis, School of Computer Science, Carnegie Mellon University, March, 1994.
....traces generated by these tools are often incomplete and of limited utility for TLB or cache simulations that require the monitoring of Instrumentation Tools 51 system wide events. Recently however, there have been tools written that do instrument kernel code and multitasking applications [4][8] 19] Overall, software only collection schemes are less expensive to implement and easier to port from system to system than hardware assisted schemes. Softwareonly schemes, however, do impose some overhead on the system under test and often are restricted in the type of runtime information ....
....and symbol table [29] Its advantages over Mahler are that the standard linker can be used and data sections remain fixed so data relocation is not necessary. Epoxie produces address traces and block statistics. An extension of epoxie has been created by Chen which can instrument kernel level code [4]. It is described in Section 4.8. Link time instrumentation is not automatic like late code modification and requires input from the user. The user must have the application object files and know the application s linking requirements. In addition, the source files are probably necessary to ....
[Article contains additional citation context not shown here]
J. Chen, "The Impact of Software Structure and Policy on CPU and Memory System Performance," Technical Report CMU-CS-94-145, School of Computer Science, Carnegie Mellon University, Pittsburgh, PA, May 1994.
No context found.
B. Chen, The Impact of Software Structure and Policy on CPU and Memory System Performance, PhD Thesis, Carnegie Mellon, CMU-CS-94-145, 1994.
No context found.
B. Chen, The Impact of Software Structure and Policy on CPU and Memory System Performance, PhD Thesis, Carnegie Mellon, CMU-CS-94-145, 1994.
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