Phoenix Technologies Ltd. System BIOS for IBM PCs, Compatibles, and EISA Computers. Addison-Wesley, Reading, MA, 1991. Home/Search Document Not in Database Summary Related Articles Check |
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Enabling Trusted Software Integrity - Potkonjak (2002) (4 citations) (Correct)
....installer. In this case, the expected value of the hash must be stored permanently in the CPU. Note that this mode of operation is actually not particularly unique, as most boot procedures for modern processors are performed in similar fashion from external ROMs containing BIOS like software [19, 16]. 3.2.1 Constraint Encoding The main goal of the software installer is to encode unique constraints for a given processor, into the target binary in a secure manner. An application s working copy is created by processing individual blocks of instructions. An instruction block (I block) is an ....
Phoenix Technologies Ltd. System BIOS for IBM PCs, Compatibles, and EISA Computers. Addison-Wesley, Reading, MA, 1991.
Chaining Layered Integrity Checks - Arbaugh (1999) (3 citations) (Correct)
....Computer Boot Process Every computer with the IBM PC architecture follows approximately the same boot process. I have divided this process into four levels of abstraction (see figure 2.1) which correspond to phases of the bootstrap operation. The first phase is the Power on Self Test or POST [Ltd91] POST is invoked in one of four ways: 1. Applying power to the computer automatically invokes POST, causing the processor to jump to the entry point indicated by the processor reset vector located at address FFFF:0000h. 2. Hardware reset al..so causes the processor to jump to the entry point ....
Phoenix Technologies Ltd. System BIOS for IBM PCs, Compatibles, and EISA Computers. Addison Wesley, 2nd edition, 1991. 114
A Secure and Reliable Bootstrap Architecture - Arbaugh, Farber, Smith (1997) (40 citations) (Correct)
....3.2 AEGIS Boot Process Every computer with the IBM PC architecture follows approximately the same boot process. We have divided this process into four levels of abstraction (see figure 2) which correspond to phases of the bootstrap operation. The first phase is the Power on Self Test or POST [17]. POST is invoked in one of four ways: 1. Applying power to the computer automatically invokes POST causing the processor to jump to the entry point indicated by the processor reset vector. 2. Hardware reset al..so causes the processor to jump to the entry point indicated by the processor reset ....
Phoenix Technologies, L. System BIOS for IBM PCs, Compatiables, and EISA Computers, 2nd ed. Addison Wesley, 1991.
Automated Recovery in a Secure Bootstrap Process - Arbaugh, Keromytis, Farber.. (1998) (10 citations) (Correct)
....2.2 AEGIS Boot Process Every computer with the IBM PC architecture follows approximately the same boot process. We have divided this process into four levels of abstraction (see figure 1) which correspond to phases of the bootstrap operation. The first phase is the Power on Self Test or POST [Ltd91]. POST is invoked in one of four ways: 1. Applying power to the computer automatically invokes POST causing the processor to jump to the entry point indicated by the processor reset vector. 2. Hardware reset al..so causes the processor to jump to the entry point indicated by the processor reset ....
Phoenix Technologies Ltd. System BIOS for IBM PCs, Compatibles, and EISA Computers. Addison Wesley, 2nd edition, 1991. REFERENCES 16
Automated Recovery in a Secure Bootstrap Process - Arbaugh, Keromytis, Farber.. (1998) (10 citations) (Correct)
....2.2 AEGIS Boot Process Every computer with the IBM PC architecture follows approximately the same boot process. We have divided this process into four levels of abstraction (see Figure 1) which correspond to phases of the bootstrap operation. The first phase is the Power on Self Test or POST [Ltd91] POST is invoked in one of four ways: 1. Applying power to the computer automatically invokes POST causing the processor to jump to the entry point indicated by the processor reset vector. 2. Hardware reset al..so causes the processor to jump to the entry point indicated by the processor reset ....
Phoenix Technologies Ltd. System BIOS for IBM PCs, Compatibles, and EISA Computers. Addison Wesley, 2nd edition, 1991.
A Secure Active Network Environment Architecture - Alexander (1998) (28 citations) (Correct)
....B. AEGIS Boot Process Every computer with the IBM PC architecture follows approximately the same boot process. We have divided this process into four levels of abstraction (see Figure 3) which correspond to phases of the bootstrap operation. The first phase is the Power on Self Test or POST [18]. POST is invoked in one of four ways: 1. Applying power to the computer automatically invokes POST causing the processor to jump to the entry point indicated by the processor reset vector. 2. Hardware reset al..so causes the processor to jump to the entry point indicated by the processor reset ....
Phoenix Technologies Ltd., System BIOS for IBM PCs, Compatibles, and EISA Computers, Addison Wesley, 2nd edition, 1991.
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