DeMoney, M., Moore, J. and Mashey, J. Operating system support on a RISC. In Proceedings of COMPCON, 138-143, 1986.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....chapter, linear virtual arrays (LVA) were excluded from this comparison because of implementational limitations. It is not clear how LVAs would perform in terms of TLB refill performance when compared to the other tested page tables. Earlier MIPS processors featured refill times of 10 14 cycles [DMM86] The minimum refill cost being 10 cycles if everything needed is in the cache. These cycle times were for an 8MHz processor, a dramatically slower processor than the one used in this thesis, and more importantly a processor with a lower ratio of CPU speed to memory speed. Translating the above ....

M. DeMoney, J. Moore, and J. Mashey. Operating system support on a RISC. Proc. COMPCON Spring 1986, 1986.

....vectored interrupt dispatching, some RISCs have eliminated this, choosing instead to do vectoring through software. For example, nearly all exceptions on the MIPS R2000, and all exceptions on the Intel i860, are vectored through one handler. In their paper on MIPS operating system support, DeMoney et al. 1986] claim that separate vectoring is unnecessary, and that most Unix systems fill these [vector] addresses with code to save the cause and then jump to a common interrupt handler, thus adding several cycles. This assumes that a specific implementation of a last generation operating system will be ....

M. DeMoney, J. Moore, and J. Mashey. Operating system support on a RISC. In Proceedings of the 31st Computer Society International Conference (Spring Compcon '86), pages 138--143, March 1986.

....Ultrix from Digital Equipment Corporation [79] and Mach 3.0 from Carnegie Mellon University [1, 10] The beliefs in Table 1 1 are stated as assertions along with their impact for system designers. These assertions are derived from the computer systems literature and are based on past experiences [31], measurements of microbenchmarks [15, 63] and extensive measurements of real systems [3, 4, 6, 24, 26, 57, 78, 82] This thesis will explore behavior related to the beliefs in Table 1 1, for truth as well as performance impact. This exploration will demonstrate that system designers have an ....

M. DeMoney, J. Moore, and J. Mashey. Operating System Support on a RISC. Proceedings of the 31st Computer Society International Conference (Spring Compcon '86), March, 1986, pp. 138-143.

....29050 [4] the HP PA [12] and the MIPS RISC [13] have shifted TLB management responsibility into the operating system. These software managed TLBs simplify hardware design and provide greater flexibility in page table structure, but typically have slower refill times than hardware managed TLBs [11]. At the same time, operating systems such as Mach 3.0 [1] are moving functionality into user processes and making greater use of virtual memory for mapping kernel data structures held A shorter version of this paper appeared in the Proceedings of the 20th Annual International Symposium on ....

....and inserts the missing PTE into the TLB. The R2000 supports two different types of TLB miss vectors. The first, called the user TLB (uTLB) vector, is used to trap on missing translations for L1U pages. This vector is justified by the fact TLB misses on L1U PTEs are typically the most frequent [11]. All other TLB miss types (such as those caused by references to kernel pages, invalid pages or read only pages) and all other interrupts and exceptions trap to a second vector, called the generic exception vector. For the purposes of this study, we define TLB miss types (Table 3) to correspond ....

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DeMoney, M., J. Moore, and J. Mashey. Operating system support on a RISC. in COMPCON. 1986.

....in computer architecture. IP addresses form a physical name space, analogous to physical memory addresses. We believe there is tremendous leverage to be gained from making the mapping from virtual to physical addresses programmable, just as there was in computer architecture with software TLB s [21]. Instead of supporting mobile computers by translating IP addresses transparently inside the network, Active Names can support mobility directly by translating a name into a connection that reconfigures itself when the endpoint moves. Likewise, network address translators (NATs) have been ....

M. DeMoney, J. Moore, and J. Mashey. Operating System Support on a RISC. In Proceedings of the 31st Computer Society International Conference (Spring Compcon '86), pages 138--143, March 1986.

....the MIPS RISC [1] and the DEC Alpha [2] have shifted TLB management responsibility into the operating system. These software managed TLBs can simplify hardware design and provide greater flexibility in page table structure, but typically have slower refill times than hardwaremanaged TLBs [3]. Design Tradeoffs for Software Managed TLBs David Nagle, Richard Uhlig, Tim Stanley, Stuart Sechrest, Trevor Mudge Richard Brown Department of Electrical Engineering and Computer Science University of Michigan e mail: uhlig eecs.umich.edu, bassoon eecs.umich.edu Presented at the IEEE ACM 20th ....

....service times. Time time based on measured median time to service TLB miss. 4 4 OS Impact on Software Managed TLBs Operating system references have a strong influence on TLB performance. Yet, few studies have examined these effects, with most confined to a single operating system [3, 5]. However, differences between operating systems can be substantial. To illustrate this point, we ran our benchmark suite on each of the operating systems listed in Table 1. The results (Table 2) show that although the same application binaries were run on each system, there is significant ....

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DeMoney, M., J. Moore, and J. Mashey. Operating system support on a RISC. in COMPCON. 1986.

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DeMoney, M., Moore, J. and Mashey, J. Operating system support on a RISC. In Proceedings of COMPCON, 138-143, 1986.

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