| K. Mehlhorn and U. Vishkin. Randomised and Deterministic Simulations of PRAMs by Parallel Machines with Restricted Granularity of Parallel Memories. Acta Informatica, 21:339--374, 1984. |
....cost. Potentially, only two simple operations are required for shared data access: the reading of shared data into local memory and the writing of local data into the shared address space. In reality, the shared data is mapped onto the local memories. The use of randomised methods in this mapping [20] can then be used to (probabilistically) guarantee predictable performance. The limited functionality allows the optimisation of any message passing operations which are used by the machine to support shared data access. An example of such a library is the Active Message Layer [7] in which the ....
K. Mehlhorn and U. Vishkin. Randomised and Deterministic Simulations of PRAMs by Parallel Machines with Restricted Granularity of Parallel Memories. Acta Informatica, 21:339--374, 1984.
....data, as is k, since the operation involves a constant number of traversals of the global router. This results in the cost O(log p N ) 4 Supporting a Weakly Coherent Shared Address Space The WPRAM assumes the use of a randomised shared memory for the support of predictable data access times [18]. Cache coherent multiprocessors, such as the Stanford DASH [15] and KSR machine [2] and distributed shared memory machines such as the Cray T3D, directly support a shared address space, but without the strict bounds on the performance of shared data access as the number of processors increase. ....
....hash function. This results in any systematic access patterns of these lines by a group of processors being transformed into random accesses (at the granularity of a line) Related theory requires that the hash function be a polynomial of a degree which is logarithmic in the number of nodes [18]. This then (probabilistically) guarantees that p log p separate accesses to 9 1 0 p 1 GLOBAL LOCAL Page 0 Page 1 Page G 1 Page G Page G L 1 0 p dsm ram 1 . LOCAL GLOBAL . h(l) Figure 2: A mapping strategy for the WPRAM shared address space dsm ram number of bytes ....
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K. Mehlhorn and U. Vishkin. Randomised and Deterministic Simulations of PRAMs by Parallel Machines with Restricted Granularity of Parallel Memories. Acta Informatica, 21:339--374, 1984.
....geometrical law. By this approximation we expect to obtain the performance value observed for the set of independent tasks running by processors sharing common memory. The requests are assumed to be evenly distributed over the memory banks, what might be achieved using universal address hashing [2]. For most cases the queueing theory deals with the performance analysis is given for models composed of units able to start request service as requests arrive. In the present work we consider models built of the units operating discretely, which is more appropriate for computer systems. Each ....
K. Mehlhorn,U. Vishkin,"Randomised and Deterministic Simulations of PRAMs by Parallel Machines with Restricted Granularity of Parallel Memories, " Acta Informatica vol. 21, pp. 339-374, 1984
....where L is the size of the cache line in bytes. ffl The size of the total data set being accessed compared to the size of the cache. It is assumed here that a line of data is stored in a random location in the cache, for example using some simple linear hash function on the shared address [19]. Figure 9 shows the cumulative probability distribution function of such a conflict occurring, prob conf , for different ratios of the data set and cache sizes. This paper assumes a reasonably large cache size compared to the data set, resulting in a negligible probability of a conflict. A more ....
K. Mehlhorn and U. Vishkin. Randomised and Deterministic Simulations of PRAMs by Parallel Machines with Restricted Granularity of Parallel Memories. Acta Informatica, 21:339--374, 1984.
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