E. Bidet et al., "A fast single-chip implementation of 8192 complex point FFT," IEEE J. Solid-State Circuits, vol. 30, pp. 300--305, Mar. 1995. Home/Search Document Not in Database Summary Related Articles Check |
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Power-Complexity Analysis of Pipelined VLSI FFT.. - Sangjin Hong Suhwan (Correct)
....the FFT and the throughput requirement given a specific processing technology. In this paper, we investigate the power dissipation and hardware complexity of a parallel pipelined FFT architecture, considering throughput, supply voltage, interconnect capacitance, and degree of parallelization [2] [5], 6] The effects of parallelism and time multiplexing on the optimal architecture are explored. This study provides valuable insights into low power FFT processor design by relating power, throughput, and performance in choosing the best single chip architecture. The remainder of this paper has ....
E. Bidet, D. Castelain, C. Joanblanq, and P. Senn, "A Fast Single-Chip Implementation of 8192 Complex Point FFT," IEEE Journal of SolidState Circuits, vol. 30, no. 3, pp. 300-305, March 1995.
A 9.5mW 330usec 1024-point FFT Processor - Baas (1998) (Correct)
....1:7 Y. Zhu, U of Calgary 1.2 16 155 Gamma 33 Gamma Gamma Gamma Dassault Electronique 1.0 12 10:2 15; 000 25 6 240 3:4 Tex Mem Sys, TM 66 0.8 32 65 7; 000 50 2 Gamma 3:4 Cobra, Col. State [9] 0.75 23 9:5 7; 700 40 16 1104 12:4 Sicom, SNC960A 0.6 16 20 2; 500 65 1 Gamma 9:0 CNET, E. Bidet [10] 0.5 10 51 300 20 1 100 13:6 Spiffee, V dd = 1:1V 0.7 0.6 20 330 9:5 16 1 25 223 Spiffee, V dd = 3:3V 0.7 0.6 20 30 845 173 1 25 27:6 Table 2: Comparison of processors calculating 1024 point complex FFTs 10 1 10 2 10 3 10 1 10 2 This work Constant Area x Time PSfrag replacements Area, ....
Bidet, E. et al., "A Fast Single-Chip Implementation of 8192 Complex Point FFT." JSSC, March 1995. Information for un-cited processors was gathered from company literature, WWW pages, and/or private communication with the designers.
Approaches to Low-Power Implementations of DSP Systems - Parhi (2001) (Correct)
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E. Bidet et al., "A fast single-chip implementation of 8192 complex point FFT," IEEE J. Solid-State Circuits, vol. 30, pp. 300--305, Mar. 1995.
Approaches to Low-Power Implementations of DSP Systems - Parhi (2001) (Correct)
No context found.
E. Bidet et al., "A fast single-chip implementation of 8192 complex point FFT," IEEE J. Solid-State Circuits, vol. 30, pp. 300--305, Mar. 1995.
Multi-Port Interconnection Networks for Radix-R Algorithms - Takala, Järvinen.. (2001) (Correct)
No context found.
E. Bidet, D. Castelain, C. Joanblanq, and P. Senn, "A fast single-chip implementation of 8192 complex point FFT," IEEE J. Solid-State Circuits, vol. 30, no. 3, pp. 300--305, Mar. 1995.
A Low-Power, High-Performance, 1024-Point FFT Processor - Baas (1999) (Correct)
No context found.
E. Bidet, D. Castelain, C. Joanblanq, and P. Senn, "A fast singlechip implementation of 8192 complex point FFT," IEEE J. Solid-State Circuits, vol. 30, pp. 300--305, Mar. 1995.
An Energy-Efficient Single-Chip FFT Processor - Baas (1996) (2 citations) (Correct)
No context found.
E. Bidet, D. Castelain, C. Joanblanq, P. Senn, "A fast single-chip implementation of 8192 complex point FFT," IEEE JSSC, vol. 30, pp. 300-305, March 1995 Fig. 1. Regular N=64, radix-2, DIT FFT dataflow diagram Fig. 2. Proposed N=64, radix-2, DIT dataflow diagram suited for caching
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