A. N. Eden and T. Mudge, "The YAGS Branch Prediction Scheme", Proceedings of the 31st Annual ACM/IEEE MICRO, pages 69-77, 1998.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....can be avoided since an agree value in the PHT for two distinct branches may mean taken for one and not taken for the other. The agree predictor is the base predictor used in this study. In this paper we employ a dynamic branch classi er that classi es branches as either easy or hard. In [1, 3], dynamic branch lter mechanisms are proposed to lter out these biased branches using simple counters and only using the dynamic predictor to predict the other branches. Alternatively, pro ling can be used to classify branches as easy or hard to predict [2, 13] In this paper, we employ a ....

A.N. Eden and T. Mudge. The YAGS branch prediction scheme. In Proc. PACT, pages 69-77, 1998.

....is hashed by XORing branch address with global branch history. Gshare is the base predictor used in this study. Hily and Seznec study branch prediction for multithreaded architectures [6] In this paper we employ a dynamic branch classifier that classifies branches as either easy or hard. In [1, 3], dynamic branch filter mechanisms are proposed to filter out these biased branches using simple counters and only using the dynamic predictor to predict the other branches. Alternatively, profiling can be used to classify branches as easy or hard to predict [2, 12] In this paper, we employ a ....

A.N. Eden and T. Mudge. The YAGS branch prediction scheme. In Proc. PACT, pages 69--77, 1998.

....can be avoided since an agree value in the PHT for two distinct branches may mean taken for one and not taken for the other. The agree predictor is the base predictor used in this study. In this paper we employ a dynamic branch classi er that classi es branches as either easy or hard. In [1, 3], dynamic branch lter mechanisms are proposed to lter out these biased branches using simple counters and only using the dynamic predictor to predict the other branches. Alternatively, pro ling can be used to classify branches as easy or hard to predict [2, 12] In this paper, we employ a ....

A.N. Eden and T. Mudge. The YAGS branch prediction scheme. In Proc. PACT, pages 69-77, 1998.

....predictor here) and various trace caching techniques. See Section 7 for further discussion. To fill this gap a system based on the Y MBP, but with modifications appropriate for a dynamically scheduled system is analyzed here and compared to a conventional system using a YAGS branch predictor, [4], and to the superblock predictor. In one comparison the amount of storage needed by the BAC is subtracted from that needed by the instruction cache, providing some measure of the tradeo#s. The comparison also accounts for the longer branch penalty of the Y MBP (due to the complexity of multiple ....

....2 1nodes. successful predictor. Only the last branch in a superblock is predicted this way, the others are assumed not taken. Other predictors are discussed in Section 7. For all the systems simulated here, including the conventional system, Y MBP, and superblock, YAGS predictors were used [4]. In YAGS a bimodal predictor provides a base prediction which is used to select one of two GHR PC indexed direction PHTs, taken or not taken. An entry in these tables holds a partial tag (portion of PC) and a two bit counter. If the tag matches the base prediction is overruled; direction ....

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A. N. Eden and T. Mudge, "The YAGS branch prediction scheme," International Symposium on Microarchitecture, December 1998, pp. 69-77.

....yield higher accuracy for two reasons: They allow the use of longer history lengths, and they reduce aliasing, which occurs when two unrelated branches destructively share the same hardware branch prediction resources. Indeed, much of the recent work has focused on methods for reducing aliasing [52, 41, 38, 57, 18]. With growing chip capacities, the focus of the research community on area and accuracy has led to large elaborate predictors, some of which require 16K to 64K byte structures [20] and to complex prediction schemes that add levels of logic to combat destructive aliasing [18, 38] Since dynamic ....

.... [52, 41, 38, 57, 18] With growing chip capacities, the focus of the research community on area and accuracy has led to large elaborate predictors, some of which require 16K to 64K byte structures [20] and to complex prediction schemes that add levels of logic to combat destructive aliasing [18, 38]. Since dynamic branch predictors use large tables to find correlations and make predictions, future branch predictors will need to consider a third dimension: delay. Figure 1.1 illustrates the problem of ignoring delay. Using an idealized delay of one cycle to access the pattern history table ....

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A.N. Eden and T.N. Mudge. The YAGS branch prediction scheme. In Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, November 1998.

....is hashed by XORing branch address with global branch history. Gshare is the base predictor used in this study. Hily and Seznec study branch prediction for multithreaded architectures [6] In this paper we employ a dynamic branch classifier that classifies branches as either easy or hard. In [1, 3], dynamic branch filter mechanisms are proposed to filter out these biased branches using simple counters and only using the dynamic predictor to predict the other branches. Alternatively, profiling can be used to classify branches as easy or hard to predict [2, 12] In this paper, we employ a ....

A.N. Eden and T. Mudge. The YAGS branch prediction scheme. In Proc. PACT, pages 69--77, 1998.

....As pipelines deepen and the number of instructions issued per cycle increases, the penalty for a misprediction increases and the benefit of accurate branch prediction increases. Recent efforts to improve branch prediction focus primarily on eliminating aliasing in two level adaptive predictors [22, 20, 28, 6], which occurs when two unrelated branches destructively interfere by using the same prediction resources. We take a different approach one that is largely orthogonal to previous work by improving the accuracy of the prediction mechanism itself. Our work builds on the observation that all ....

....counter is taken as the prediction. Once the branch outcome is known, the counter is incremented if the branch is taken, and decremented otherwise. An important problem in twolevel predictors is aliasing [25] and many of the recently proposed branch predictors seek to reduce the aliasing problem [22, 20, 28, 6] but do not change the basic prediction mechanism. Given a generous hardware budget, many of these two level schemes perform about the same as one another [6] Most two level predictors cannot consider long history lengths, which becomes a problem when the distance between correlated branches is ....

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A.N. Eden and T.N. Mudge. The YAGS branch prediction scheme. In Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, November 1998.

....slower simulations, we use TFsim [25] to model out of order processor cores and L1 caches. TFsim models a four wide superscalar processor, with an eleven stage pipeline (fetch (3) decode (3) schedule (1) execute (1 or more) and retire (3) TFsim models a 1 KB YAGS direct branch predictor [11], a 64 entry cascaded indirect branch predictor [9] a 64 entry return address stack predictor [14] and a 64 entry reorder buffer (unless otherwise specified) 3.3. Introducing Variability As described in Section 2.1, workloads exhibit space variability on real systems due to small timing ....

Avinoam Nomik Eden and Trevor Mudge. The YAGS Branch Prediction Scheme. In Proceedings of the 25th Annual International Symposium on Computer Architecture, pp. 69-- 77, June 1998.

....While eliminating all branch prediction aliasing is not trivial, it is our belief that the destructive user OS part can be alleviated with appropriate architectural support. There are numerous branch predictors that have been proposed to address different situations [30] 14] 7] 25] 10] 4] 15][6]. These prediction mechanisms have paid less attention to the OS requirements and no particular scheme was proposed on tuning control flow prediction hardware for the OS. Our intention in this paper, however, is not to propose a new predictor to add to this list. Rather, it is to understand the ....

A. N. Eden and T. Mudge, The YAGS Branch Prediction Scheme, In Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, pages 69-77, 1998.

....(conflict mispredictions) which arise when unrelated branches happen to collide in a particular branch predictor entry and overwrite each other s state. A wealth of effective techniques have been developed to reduce conflict occurrence in the pattern history table (PHT) of two level predictors [5], 25] 27] 36] Even without using aggressive anti aliasing techniques, conflicts account for only 15 20 of mispredictions in global history predictors and 40 50 in local history predictors. Work on hybrid predictors with global and local history based components [3] 9] implicitly ....

....in [36] Michaud et al. 25] introduced a skewed predictor, in which the branches simultaneously exist in multiple PHTs, and each PHT is indexed using a different hash function. A voting function combines the multiple PHT results to generate a prediction. Lee et al. 23] and Eden and Mudge [5] observed that conflicting substreams may be strongly biased, just in opposite directions. They described the bi mode predictor [23] and later a YAGS predictor [5] that use a meta predictor to separate branch substreams of opposite bias. The YAGS predictor extends the bi mode organization by ....

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A. N. Eden and T. Mudge. The YAGS branch prediction scheme. In Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, pages 69--77, Dec. 1998.

....hold one or more possible target addresses, even target instructions. Since every branch prediction table is of a finite size, different branches will use the same cell. This effect is called interference or aliasing [15] and lot of research has been dedicated to the interference problem [16] 17][18]. Some special branch types, such as returns and loops, could be handled by specialized predictors. 3. Problem Statement For both P6 and NetBurst architectures, Intel sources [19] 20] 21] do not provide the exact description of the implemented branch predictors. Rather, they provide the ....

A.N. Eden, T. Mudge, "The YAGS Branch Prediction Scheme," MICRO-31, USA, 1998.

....studied in this paper. While eliminating all branch prediction aliasing is not trivial, it is our belief that the destructive user OS part can be alleviated with appropriate architectural support. There are numerous branch predictors that have been proposed to address different situations [Yeh93, Far93, Ever96, Spra97, Lee97, Chang96, Mish97 and Eden98]. These prediction mechanisms have paid less attention to the OS requirements and no particular scheme was proposed on tuning control flow prediction hardware for the OS. Our intention in this paper, however, is not to propose a new predictor to add to this list. Rather, it is to understand the ....

A. N. Eden and T. Mudge, The YAGS Branch Prediction Scheme, In Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, pages 69 - 77, 1998

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A. N. Eden and T. Mudge, "The YAGS Branch Prediction Scheme", Proceedings of the 31st Annual ACM/IEEE MICRO, pages 69-77, 1998.

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A.N. Eden and T. Mudge. The YAGS branch prediction scheme. In Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, Nov 1998.

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EDEN,A.AND MUDGE, T. 1998. The YAGS branch prediction scheme. In Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, 69--80.

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A. N. Eden and T. N. Mudge. The YAGS branch prediction scheme. In Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, pages 69--80, November 1998.

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A. N. Eden and T. Mudge, "The YAGS Branch Prediction Scheme", Proceedings of the 31st Annual ACM/IEEE MICRO, pages 69-77, 1998.

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A. N. Eden and T. N. Mudge. The YAGS branch prediction scheme. In Proceedings of the Intl. Conference on Parallel Architectures and Compilation Techniques, pages 69--77, Oct. 1998.

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A. N. Eden and T. Mudge, "The YAGS branch prediction scheme," International Symposium on Microarchitecture, December 1998, pp. 69-77.

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A. N. Eden and T. Mudge, "The YAGS Branch Prediction Scheme", In Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, pages 69-77, 1998.

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A.N. Eden and T.N. Mudge. The YAGS branch prediction scheme. In the 31st Int'l Symp. on Microarchitecture, Nov. 1998.

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A.N.Eden and T.Mudge. The YAGS branch prediction scheme. In Proceedings of the International Symposium on Microarchitecture, pages 69--77, November 1998.

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Avinoam N. Eden and Trevor Mudge. The YAGS Branch Prediction Scheme. In Proceedings of the 25th Annual International Symposium on Computer Architecture, pages 69--77, June 1998.

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A. N. Eden and T. N. Mudge, "The YAGS Branch Prediction Scheme," in Proceedings of the 31st International Symposium on Microarchitecture, (Dallas, TX, USA), pp. 69--77, November 1998.

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Eden, A. N., and Mudge, T. The YAGS Branch Prediction Scheme. Proceedings of the 31st Annual International Symposium on Microarchitecture (1998).

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