| W. Crowther, J. Goodhue, E. Starr, R. Thomas, W. Milliken, and T. Blackadar, "Performance Measurements on a 128-Node Butterfly Parallel Processor," In Proceedings of the International Conference on Parallel Processing, pages 531-540, August 1985. |
.... spaces the machine is categorized as a distributed memory distributed address space machine (an example is the Intel iPSC 2) If on the other hand the machine has a common global address space it is categorized as a distributed memory shared address space machine (an example is the BBN Butterfly [4] ) The above architectural categories have also been defined as Uniform Memory Access (UMA) Non Uniform Memory Access (NUMA) and No Remote Memory Access (NORMA) 5] Further architectural distinctions can be made within the NUMA category according to the degree of uniformity of a machine s ....
W. Crowther et al., "Performance Measurements on a 128 Node Butterfly Parallel Processor," Proceedings of the 1985 International Conference on Parallel Processing, pp. 531-540, August -11- 1985.
....either the message passing model or the non uniform memory access (NUMA) shared memory model to the programmer. Recent message passing systems include the iPSC 2 [Int88, Arl88] nCUBE 2 [Tro89] iPSC 860 [HeG90] CM 5 [Thi91] and the Intel Paragon [Int91] NUMA machines include the BBN Butterfly [CrG85], CAMPUS 800 (which is constructed from clusters of FX 2800 systems [All91] or Cedar [GaL84] Both the message passing and NUMA shared memory model provide regions of memory in which processors can execute efficiently (i.e. local memory and or cache) however, these models do not provide ....
W. Crowther, J. Goodhue, R. Thomas, W. Milliken, and T. Blackadar, "Performance measurements on a 128-node butterfly parallel processor," 1985 International Conference on Parallel Processing, August 1985, pp. 531-540.
....PEs execute asynchronously with respect to one another. As with the SIMD model, the interconnection network provides communication links among the PEs, and allows some MIMD machines to be partitioned. Examples of MIMD systems with a similar structure that have been built include the BBN Butterfly [CrG85], CM 5 [HiT93] Cosmic Cube [Sei85] IBM RP3 [PfB85] Intel Cube [Arl88] and Paragon [AlG94] and nCUBE 2 [HaM89] In general, SPMD ###### (single program multiple data stream) DaG88] mode is the use of a MIMD machine when all PEs independently execute copies of the same program asynchronously ....
W. Crowther, J. Goodhue, R. Thomas, W. Milliken, and T. Blackadar, "Performance measurements on a 128-node butterfly parallel processor," 1985 International Conference on Parallel Processing, August 1985, pp. 531-540.
....proposed (Budnik and Kuck, 1971) In distributed memory machines, a memory can only be accessed by one processor, which is usually tightly coupled through local interconnect. Figure 1 shows generic shared memory and distributed memory systems. In some hybrid machines (for example the BBN butterfly (Crowther, et al., 1985), and Intel Paragon) the memory is physically distributed, but can be accessed by all processors as part of a shared address space. However, the disparity between local and remote access times is usually so large, that these machine behave like distributed memory ones from a performance viewpoint. ....
Crowther, W. et al (1985) "Performance measurements on a 128-node butterfly parallel processor", Proceedings of the 1985 International Conference on Parallel Processing, IEEE. Cat 85CH2140-2, pp 531540.
No context found.
W. Crowther, J. Goodhue, E. Starr, R. Thomas, W. Milliken, and T. Blackadar, "Performance Measurements on a 128-Node Butterfly Parallel Processor," In Proceedings of the International Conference on Parallel Processing, pages 531-540, August 1985.
No context found.
W. Crowther, J. Goodhue, E. Starr, R.H. Thomas, W. Milliken, and T. Blackadar. "Perfor- mance Measurements on a 128-Node Butterfly Parallel Processor". In Proceedings of the 1985.
....synchronous, store and forward packet switching multistage cube networks [21, 22, 23] connecting N = 2 n inputs with N outputs. Multistage cube networks are representatives of a family of topologies that includes the omega [16] indirect binary n cube [19] delta [6] baseline [31] butterfly [4], and multistage shuffle exchange networks [27] They can be constructed by using BxB crossbars so that the network has s = logB N stages of N B switch boxes each. It is assumed that N is a multiple of B. A multistage cube network with N = 16 and B = 4 is shown in Figure 7. Considering the ....
W. Crowther, J. Goodhue, R. Thomas, W. Milliken, and T. Blackadar, "Performance measurements on a 128-node butterfly parallel processor," 1985 International Conference on Parallel Processing, August 1985, pp. 531-540.
No context found.
W. Crowther, J. Goodhue, E. Starr, R. Thomas, W. Milliken, and T. Blackadar, "Performance Measurements on a 128-Node Butterfly Parallel Processor", Proc. ICPP 1985b, pp. 531-540.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC