S.S. Mukherjee and M.D. Hill, "The Impact of Data Transfer and Buffering Alternatives on Network Interface Design," Proc. 4th Int'l Symp. High-Performance Computer Architecture (HPCA-4), IEEE CS Press, Los Alamitos, Calif., 1998, pp. 207-218.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....that can be used both in the middle of the network, at nodes composing the backbone of the Internet, as well as at the edges of the network in enterprise class routers, switches, and host network interfaces. Thus, we do not consider network interfaces that are directly attached to the memory bus [15] or more elaborate, but less general purpose, communication co processors for MPP s such as the Magic chip used in the Stanford Flash multiprocessor [13] or the Meiko CS 2 network interface [4] Even with this restriction, the range of functionality of network processors is quite large. Until ....

....Web Switching [1] Web load balancing and proxy cache monitoring. Virtual Private Network IP Security (IPSec) Encryption (3DES) and Authentication (MD5) Data Transcoding [8] Converting a multimedia data stream from one format to another within the network. Duplicate Data Suppression[15] Reduce superfluous duplicate data transmission over high cost links. Table 1. Representative tasks and application specific packet processing routines. 5 second, the network processor did not exercise a full system workload. In this work, we intend to address each of these issues. Packet ....

S.S. Mukherjee and M.D. Hill. The Impact of Data Transfer and Buffering Alternatives on Network Interface Design. Proceedings of the Fourth International Symposium on High-Performance Computer Architecture (HPCA), February 1998.

....are easily portable. This protocol however is known to cause too much overhead [7] Especially lowering latency is an important key to achieve good communication performance. A survey on message sizes shows that protocols and hardware have to be designed to handle short messages extremely well [14]: in seven parallel scientific applications 30 of the messages were between 16 bytes and a kilobyte the median message sizes for TCP and UDP traffic in a departmental network were 32 and 128 bytes respectively 99 of TCP and 86 of the UDP traffic was less than 200 bytes on a ....

Mukherjee and Hill. The Impact of Data Transfer and Buffering Alternatives on Network Interface Design, HPCA98, Feb. 1998

....but this is not always easy or possible, particularly since the data can become stale if the pre fetch occurs too early. We studied the above design options in 1994 when we designed the StarT NG [19] and again in late 1995 when we started designing StarT Voyager. Independently, Mukherjee et al. [77, 78] also studied the problem of message passing interface design for NIU connecting to coherent memory buses. The most interesting result of their work is a class of message passing interfaces that they named Coherent Network Interfaces (CNI) We will discuss these after we describe Basic Message. ....

S. S. Mukherjee and M. D. Hill. The Impact of Data Transfer and Buffering Alternatives on Network Interface Design. In Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, Feb. 1998.

....that may be intolerable to the network. We proposed a solution to the VNI problem in [50] and partly evaluated it in [51] This VNI solution is implemented in FUGU and is the focus of this thesis. Other recent network interface work addresses the VNI problem with similar goals, notably CNI [58], the T family [61, 2] and the M machine [25] These projects are described as related work in Chapter 8. ffl Second is the DMA problem. Efficient bulk transfer through messages requires the support of Direct Memory Access (DMA) hardware or equivalent functionality provided by a coprocessor. ....

....in terms of correctness becomes a receiver side protection issue. However, there is also a similar performance issue: it might be beneficial to remove messages from the network (or, symmetrically, not to inject them) just to improve traffic flow within the network. Mukherjee, et al. [58], found it beneficial to buffer messages at the receiver automatically in some applications. Direct vs. Buffered Interfaces. Message passing network interfaces developed for high performance parallel machines have taken two general approaches: direct and memory based. Direct interfaces allow the ....

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Subhendu S. Mukherjee and Mark D. Hill. The Impact of Data Transfer and Buffering Alternatives on Network Interface Design. In Proceedings of the Fourth International Symposium on High-Performance Computer Architecture (HPCA-4), February 1998.

....affecting the performance of networks include the speed of the CPU and the method with which the operating system translates user requests to network transmissions. It is desirable but not always possible to bypass the operating system, and significant work has been done to accomplish this goal [12, 1, 2, 7, 8, 11]. Two additional factors affecting network performance are the architecture of the system (e.g. whether network operations are mapped to I O or to memory, the bus on which the network interface is connected) and the network protocol that is employed. Some of the steps involved in the transmission ....

Shubhendu S. Mukherjee and Mark D. Hill. The Impact of Data Transfer and Buffering Alternatives on Network Interface Design. In 4th International Symposium on High-Performance Computer Architecture (HPCA), pages 207--218. IEEE Computer Society, January 1998.

....and cachable queues (CQs) A CDR is a coherent, cache block used by a processor to communicate information to or from a CNI device (Section 3.1) A CQ generalizes this concept into a contiguous region of coherent, cache blocks (Section 3.2) Because CDRs and CQs can be 1. Available partially in [85, 89]. 42 cached in processor and CNI caches, they require a home, which is an I O device or memory module that services requests and accepts writebacks for CDR and CQ blocks (Section 3.3) Section 3.4 describes a concise taxonomy of the CNI design space exposed by CDRs, CQs, and their homes. Section ....

Shubhendu S. Mukherjee and Mark D. Hill. The Impact of Data Transfer and Buffering Alternatives on Network Interface Design. In Proceedings of the Fourth IEEE Symposium on High-Performance Computer Architecture, pages 207--218, February 1998.

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S.S. Mukherjee and M.D. Hill, "The Impact of Data Transfer and Buffering Alternatives on Network Interface Design," Proc. 4th Int'l Symp. High-Performance Computer Architecture (HPCA-4), IEEE CS Press, Los Alamitos, Calif., 1998, pp. 207-218.

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