27 citations found. Retrieving documents...
K. Y. Siu and J. Bruck, "Neural computation of arithmetic functions," Proc. IEEE, vol. 78, no. 10, pp. 1669--1675, Oct. 1990.

 Home/Search   Document Not in Database   Summary   Related Articles   Check  

This paper is cited in the following contexts:

First 50 documents

LSAT - An Algorithm for the Synthesis of Two Level.. - Oliveira.. (1991)   (3 citations)  (Correct)

....of threshold gates can implement functions that require unbounded level networks of purely logic gates. For example, it has been shown that functions like multiple addition, multiplication, division and sorting can be implemented by polynomial size threshold cir cuits of small constant depth [1, 2]. While it is unclear whether or not these results will have practical implications in the design of real integrated circuits, the study of algorithms for the synthesis of threshold gate networks remains important in other areas, such as artificial neural networks and machine learning. This paper ....

K. Y. Siu & J. Bruck "Neural Computation of Arithmetic Functions" Proc. IEEE, 78, No. 10:1669-1675, October 1990.


On the Circuit Complexity of Sigmoid Feedforward Neural Networks - Beiu, Taylor (1996)   (Correct)

.... the family of BFs realised by polynomial size TGCs with unbounded fan in and depth limited by O (log k n) LT k (LT k ) which is the class of BFs computed by polynomial size TGCs with arbitrary real weights (bounded by a polynomial in the number of inputs n) and depth k (Bruck, 1990; Siu Bruck, 1990); MAJ k , which is the class of BFs computed by polynomial size, depth k circuits of majority gates (TGs having 1 weights) Mayoraz, 1991; Albrecht, 1992) clearly MAJ k LT k , being a subclass of LT k . While many results concerning TGCs have been lately discovered or improved (Siu ....

....1990) MAJ k , which is the class of BFs computed by polynomial size, depth k circuits of majority gates (TGs having 1 weights) Mayoraz, 1991; Albrecht, 1992) clearly MAJ k LT k , being a subclass of LT k . While many results concerning TGCs have been lately discovered or improved (Siu Bruck, 1990; Bruck Smolensky, 1992; Wegener 1993) and their complexity discussed (Roychowdhury et al. 1991; Williamson, 1991; Albrecht, 1992; Beiu et al. 1994b) little is known about the case of sigmoid activation functions (Siu 1992) For placing ANNs in the context of BC complexity, the class NN k ....

[Article contains additional citation context not shown here]

Siu, K.-Y., & Bruck, J. (1990). Neural Computation of Arithmetic Functions. Proceedings of the IEEE, 78(10), 1669-1675.


Signed Digit Addition and Related Operations with Threshold.. - Sorin Cotofana And (2000)   (Correct)

....T , computing F (X) sgn(F(X) Given that TL may be promising, it is of interest to investigate new schemes applicable to such a new technology. To this end, assuming binary non redundant representations, a number of recent proposals regarding addition and multiplications, see for example [13], 14] 15] 16] 17] 18] 19] 20] have been developed that assume threshold rather than Boolean logic. Thus far there are no studies assuming redundant representations and TL. In this paper we assume SD number representation and we investigate linear threshold networks for 2 Gamma 1 ....

K. Y. Siu and J. Bruck, "Neural Computation of Arithmetic Functions," Proc. IEEE, vol. 78, pp. 1669--1675, October 1990.


Placing Feedforward Neural Networks Among Several.. - Beiu..   (Correct)

.... of BFs realized by polynomial size TGCs with unbounded fan in and depth limited by O (log E 133 k E 129 n) E 118 l LT k (LT E 140 E 143 k ) is the class of BFs computed by polynomial size TGCs with arbitrary real weights (bounded by a polynomial in the number of inputs n) and depth k [8, 19]; l MAJ k is the class of BFs computed by polynomial size, depth k circuits of MAJORITY gates (TGs having 1 weights) 2, 15] clearly MAJ k LT E 2 E 5 k (is a subclass of LT k ) While many results concerning TGCs have been lately discovered or improved [8, 9, 19, 20] and their ....

.... inputs n) and depth k [8, 19] l MAJ k is the class of BFs computed by polynomial size, depth k circuits of MAJORITY gates (TGs having 1 weights) 2, 15] clearly MAJ k LT E 2 E 5 k (is a subclass of LT k ) While many results concerning TGCs have been lately discovered or improved [8, 9, 19, 20] and their complexity discussed [2, 5, 15, 17, 26] little is known for the case of sigmoid activation functions. For placing NNs in the context of BC complexity the class NN E 32 k E 29 has been defined [18] to be those BFs which can be computed by a family of polynomially sized neural ....

K.-Y. Siu, and J. Bruck "Neural Computation of Arithmetic Functions." Proc. IEEE, 78(10), 1669-1675, 1990.<E-152>


Addition Using Constrained Threshold Gates or.. - Beiu.. (1994)   (Correct)

.... of present day analog technologies [23] All of these hardly explored parameters, and the tradeoffs between them have motivated research to find algorithms for reducing the complexity of NNs [13, 24] A lot of work has been devoted to find minimum size and or minimum constant depth TG circuits [6, 8, 10, 11, 14] but little is known about tradeoffs between those two cost functions [15] And even less about how design parameters like fan in, weights and thresholds influence the overall area and time performances. It would be useful to find answers to such problems for any BF, but since for the general case ....

.... to find answers to such problems for any BF, but since for the general case only existence exponential bounds are known [8, 15] it is important to isolate classes of functions whose implementation is simpler than that of others (polynomial) and to find efficient solutions for their synthesis [14, 25]. This paper strives on these lines and shows that VLSI efficient implementations of a class of BFs using TGs are possible. In Section 2 we present some theoretical results which will be used in Section 3 for implementing ADDITION. By having the fan in as an additional parameter we will be able ....

K.-Y. Siu and J. Bruck, Neural Computation of Arithmetic Functions, Proc. IEEE 78(10) (1990) 1669-1675.<E-30>


Enhanced Threshold Gate Fan-In Reduction Algorithms - Beiu, Peperstraete, Lauwereins (1993)   (Correct)

....from both of them, having binary inputs but analog summation. They are challenging alternative to classical Boolean solution due to solid theoretical background from the 60s E 178 [17,23,24,26] E 144 , new interest proven by many articles from the late 80s E 210 [27] E 200 and 90s E 169 [9 13,30 35] E 135 , as well as proposals of implementation [5,19] In section 2 we will present a divide and conquer algorithm for reducing the fan in of symmetric functions (any function, if we are allowed to repeat each input variable) and will improve on its efficiency in section 3, by showing how ....

.... LT 1 is the class of BFs computed by LTGs with weights bounded by a polynomial in the number of inputs ( w i N c ) 11] LT k the class of BFs computed by a polynomial size depth k circuit of LT 1 gates (the depth being the number of gates on the longest input output path) [11,30] ; MAJ1 the class of BFs computed by LTGs having 1 weights (these compute functions analogous to MAJORITY gates) 21,31] and MAJk the class of BFs computed by a polynomial size depth k circuit of MAJ 1 gates [22,32] It should also be mentioned that more efficient constructions for ....

[Article contains additional citation context not shown here]

K.-Y. Siu and J. Bruck, Neural Computation of Arithmetic Functions, Proc. of IEEE, 78(1990), 10, 1669.


Neural Networks and Complexity Theory - Orponen (1992)   (7 citations)  (Correct)

.... on two n bit numbers can be computed by such networks in depth 2 [52, 57] the product of two n bit numbers can be computed in depth 4 [70] and analytic functions with a convergent rational power series (e.g. sin, cos, exp, log, sqrt) can all be approximated in bounded depth [63] cf. also [69]) It is therefore of great interest to consider also the following fixed depth sublevels of the class TC 0 individually: TC 0 d = ffunctions computable by neural circuits of polynomial size and depth dg; c TC 0 d = ffunctions computable by threshold circuits of polynomial size and depth ....

Siu, K.-Y., Bruck, J. Neural computation of arithmetic functions. Proc. of the IEEE 78 (1990), 1669--1675.


Area-Time Performances of Some Neural Computations - Beiu, Peperstraete.. (1994)   (Correct)

....solution for Fn,m functions (BFs of n variables having m groups of ones [7] Section IV presents several conclusions and further directions of research. II. COMPARISON A. Depth and Size X and Y are binary numbers of n bits each: X = x n 1 . x 0 , Y = y n 1 . y 0 , COMPARISON [8] 9] [10], 11] being defined: C n ( X,Y) 1 if X Y (X Y) 0 if X Y (X Y) 1) These are isobaric function [12] 13] and: Cn (X,Y) Cn (X 1,Y) Cn (X,Y 1) 2) It is known [8] 14] 15] that with unbounded fan in TGs COMPARISON: i) cannot be computed by a single TG ....

K.-Y. Siu and J. Bruck, "Neural computation of arithmetic functions," Proc. IEEE, vol. 78, no. 10, pp. 1669-1675, Oct. 1990.


Aspects of Systems and Circuits for Nanoelectronics - Goser, Pacha, Kanstein.. (1997)   (4 citations)  (Correct)

....in a linear threshold network (LTN) with fixed weights. In a previous section, we have seen that LTG s might be implemented with a few number of devices as MOBILE or The advantages of LTG s are the higher computational capabilities compared to Boolean gates commonly used in purely digital logic [75]. Although LTG s are capable of emulating AND, OR and NOT gates, a purely replacement of those gates would be a very trivial method. Normally, this procedure leads to large feed forward networks with a depth of many layers and long delay time. In this case, there is only a less increased overall ....

K. Y. Siu and J. Bruck, "Neural computation of arithmetic functions, " Proc. IEEE, vol. 78, no. 19, Oct. 1990, pp. 1669--1675.


Counters and Multipliers with Threshold Logic - Huisman (1995)   (Correct)

.... a direct implementation then a depth 9 Boolean network is required to produce the partial product of two rows (which then are feed to a 2 1 adder that produces the final result) The same matrix reduction, independent of the operand lengths, can be achieved with a depth 2 threshold gate network [LB91, SB90a, HHK91]. If for the moment the cost in terms of threshold gates is excluded the advantage of using feed forward networks is apparent. The cost however of the reduction in term of threshold gates is still large. The most cost effective method known today is presented in [LB91] In assuming such a method, ....

K. Y. Siu and J. Bruck. "Neural Computation of Arithmetic Functions". Proc. IEEE, 78(10):1669--1675, October 1990.


Block Save Addition with Threshold Gates - Vassiliadis Cotofana (1995)   (1 citation)  (Correct)

....X N MATRIX Figure 1. 7: A Vertical Block Partitioning of the Matrix In constructing small depth linear threshold networks for the summation of N M bit numbers a scheme has been proposed, termed as block save addition, that resolves the overlapping dilemma for the design of multi operand addition [SB90, LB91a, SBKH93]. The approach can be summarized as follows: 1. The N rows of the matrix are divided into columns containing log N bits. 2. If a column contains log N bits, then the sum of N numbers of logN bits is at most N Delta (2 logN Gamma 1) 2 logN Delta (2 logN Gamma 1) 2 2logN , suggesting ....

....one s from position log N i to position log N m Gamma 1 i. Thus the sum of a block requires log N m bit for its representation. To avoid overlapping of more than two rows it must be that log N m 2 Delta m m log N . QED 1. 3 Block Save Addition with Threshold Gates Siu et al..l [SB90] 13 have shown a two level(depth 2) implementation of complex functions, including block save addition. This design is based on the following observation 14 : Every interval of consecutive integers can be uniquely identified by two numbers (namely: one that identifies the lowest integer in the ....

[Article contains additional citation context not shown here]

K. Y. Siu and J. Bruck. Neural Computation of Arithmetic Functions. Proc. IEEE, 78(10):1669--1675, October 1990.


On the Power of Democratic Networks - Eddy Mayoraz (1996)   (Correct)

....f(b 1 ; b n ) f(b oe(1) b oe(n) for any permutation oe of the inputs. A well known characterization of symmetric functions is the following: f is symmetric if there exists k integers t 1 ; t k such that f(b 1 ; b n ) 1 iff P n i=1 b i 2 ft 1 ; t k g [6, 17]. Corollary 3.5 Any symmetric Boolean function is in MAJ 3 . Proof: This result is a direct consequence of proposition 3.4 and of construction presented in [6, 17] f(b) maj Gamma (AT LEAST t 1 (b) AT MOST t 1 (b) AT LEAST t k (b) AT MOST t k (b) 4) where maj Gamma denotes the ....

....is symmetric if there exists k integers t 1 ; t k such that f(b 1 ; b n ) 1 iff P n i=1 b i 2 ft 1 ; t k g [6, 17] Corollary 3.5 Any symmetric Boolean function is in MAJ 3 . Proof: This result is a direct consequence of proposition 3. 4 and of construction presented in [6, 17]: f(b) maj Gamma (AT LEAST t 1 (b) AT MOST t 1 (b) AT LEAST t k (b) AT MOST t k (b) 4) where maj Gamma denotes the majority function with all coefficients 1 and a negative threshold. RRR 4 95 Page 7 The n PARITY function is defined as the product of its inputs: f(b 1 ; ....

K.-Y. Siu and J. Bruck, Neural computation of arithmetic functions, Proceedings of the IEEE, 78 (1990), pp. 1669--1675.


Block Save Addition with Telescopic Sums - Vassiliadis Hoekstra (1995)   (3 citations)  (Correct)

.... central to the implementation in hardware of higher order arithmetic operations such as multiplication [1, 2, 3, 4, 5, 6] Block save addition (BSA) is a technique that has been used in conjunction with linear threshold gates for the reduction of the multi operand addition matrices into two rows [7, 8, 9]. Briefly stated, the basic idea behind this technique is to vertically partition the matrix for the multi operand sum into blocks. Clearly email: fstamatis,jaap,soring.duteca.et.tudelft.nl the sum of a single block will exceed the width of an individual block, thus the partitioning has to be ....

....each (log 16 = 4) It can be easily verified that the sum of the even columns does not overlap with the sum of the odd columns thus the sum of the columns forms a two row addition. m = 4 even partial sum odd partial sum N=16 Figure 1: Block save addition of 16 16 bit numbers It has been shown [7] that the block save addition can be implemented with depth 2 linear threshold element networks. Regarding the requirements of this implementation it has been estimated in [8] that the implementations has a cost of O(N 4 log N ) wires, O(N 3 ) gates, and a maximum fan in (due to the second ....

[Article contains additional citation context not shown here]

K. Y. Siu and J. Bruck. Neural Computation of Arithmetic Functions. Proc. IEEE, 78(10):1669-- 1675, October 1990.


Periodic Symmetric Functions with Feed-Forward Neural Networks - Sorin Cotofana (1996)   (Correct)

....functions) namely the symmetric Boolean functions that can be decomposed in l periodic symmetric sub functions. Our findings are of significance because a number of Boolean functions present in computers are either symmetric functions, e.g. error detection, or generalized symmetric functions [5, 6], e.g. arithmetic operations, and they belong to the class of periodic symmetric functions for which our results are applicable. We organize the presentation as follows: in Section 2 we introduce the subject and prove some preliminary results; in Section 3 we prove the main results; we conclude ....

K. Y. Siu and J. Bruck, "Neural Computation of Arithmetic Functions," Proc. IEEE, vol. 78, pp. 1669-- 1675, October 1990.


Serial Binary Addition with Polynomially Bounded Weights - Cotofana, Vassiliadis   (Correct)

....are the basis for the computing paradigm, a number of investigations have been reported regarding the possibilities of such an approach in the design of useful Boolean functions. The studies range from symmetric functions 1 [2] to more complex functions, such as multiplication, addition, [3] present in most hardwired computational engines. The investigations mainly concern with the upper lower bounds for the depth of the networks (worse case delay) and the cost (the size of the network) to be expected in a realization. While these are extensive studies concerning complex to implement ....

Siu, K.Y., Bruck, J.: Neural computation of arithmetic functions. Proc. IEEE 78 (1990) 1669-1675.


Functional Integration of Parallel Counters Based on.. - Pacha, Goser (1997)   (Correct)

....sum c of the digital inputs x i , i=1. n, and converts this sum afterwards into a digital output y by comparing with a given threshold value Q. Using different sets of weights w i and adapting the threshold value LTGs are capable to compute any linear separable Boolean function of the n inputs [7]. Thus, LTGs combine an internal analog computation of the weighted sum with digital input and output states. The output y of a LTG with fixed integer weights is given by ( y( sgn c c c c = Q Q Q if if 1 0 , c = w x i i i n 1 , x i 0,1 , w w i max , ....

K. Siu, J. Bruck, Neural Computation of Arithmetic Functions, Proc. IEEE, 78 (19), Oct. 1990, pp. 1669-1675.


Periodic Symmetric Functions, Serial Addition and.. - Cotofana, Vassiliadis (1998)   (Correct)

....investigate the implications that our results have in the implementation of some arithmetic operations. A number of investigations have been reported regarding the implementation with threshold based neural networks of arithmetic operations such as addition, multiplication, see for example [12] [14], 16] 17] present in most hardwired computational engines. The investigations mainly concern 7 They are either symmetric functions, e.g. error detection, or generalized symmetric functions [14] 15] e.g. arithmetic operations. DRAFT 6 with the upper lower bounds for the depth of the ....

....neural networks of arithmetic operations such as addition, multiplication, see for example [12] 14] 16] 17] present in most hardwired computational engines. The investigations mainly concern 7 They are either symmetric functions, e.g. error detection, or generalized symmetric functions [14], 15] e.g. arithmetic operations. DRAFT 6 with the upper lower bounds for the depth of the networks (worse case delay) and the cost (the size of the network) to be expected in a realization. All known results, see for example [12] 14] 16] 17] concern parallel circuit implementations. ....

[Article contains additional citation context not shown here]

K. Y. Siu and J. Bruck, "Neural Computation of Arithmetic Functions," Proc. IEEE, vol. 78, no. 10, pp. 1669--1675, October 1990.


New Efficient Majority Circuits for the Computation of Some.. - Yeh, al. (1996)   (Correct)

....0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 1 1 0 1 0 1 0 1 0 0 1 1 0 1 0 0 0 1 0 0 1 1 1 0 0 0 1 0 0 1 0 0 1 1 0 1 0 1 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 0 1 0 1 0 1 0 1 1 0 0 1 0 1 0 1 0 1 0 0 0 0 1 0 1 0 1 1 0 1 0 1 Fig. 1: The iterated addition of 9 12 bit numbers using the block save technique [22, 23, 25]. We are now in a position to prove the main result of this section. Theorem 3.3 The sum of n numbers of length m can be computed using a majority circuit of depth 2 e O(1) size O( 1 e mn e mlogm) and fan in O(m n) for any e 2 (0;1] Proof: We fi rst obtain two numbers whose sum is ....

....provide effi cient methods to trade depth for size in the circuits obtained by appropriately choosing some parameter e. The constructions that we give can be optimized further (e.g. some additional savings can be obtained in the conversion circuits; also the depth reduction technique used in [23, 24], where successive layers are merged into a single layer under certain conditions, can be employed at several points in our design to reduce the circuit depth) We did not try to pursue all possible optimizations here, because they would considerably complicate our presentation, and we prefer to ....

K.Y. Siu and J. Bruck " Neural computation of arithmetic functions," Proc. IEEE, Vol. 78, No. 10, pp. 1669-1675, Oct. 1990.


Block Save Addition with Threshold Logic - Vassiliadis Cotofana (1995)   (Correct)

.... is central to the implementation in hardware of higher order arithmetic operations such as multiplication [1, 2, 3, 4] Block save addition (BSA) is a technique that has been used in conjunction with linear threshold gates for the reduction of the multi operand addition matrices into two rows [5, 6, 7, 8]. It has been shown [5] that the block save addition can be implemented with depth 2 linear threshold element networks. Lauwereins and Bruck [6] have introduced two minimizations that substantially reduce email: fstamatis,sorin,jaapg duteca.et.tudelft.nl the overall cost of the block save ....

.... in hardware of higher order arithmetic operations such as multiplication [1, 2, 3, 4] Block save addition (BSA) is a technique that has been used in conjunction with linear threshold gates for the reduction of the multi operand addition matrices into two rows [5, 6, 7, 8] It has been shown [5] that the block save addition can be implemented with depth 2 linear threshold element networks. Lauwereins and Bruck [6] have introduced two minimizations that substantially reduce email: fstamatis,sorin,jaapg duteca.et.tudelft.nl the overall cost of the block save realization. It has been ....

[Article contains additional citation context not shown here]

K. Y. Siu and J. Bruck. Neural Computation of Arithmetic Functions. Proc. IEEE, 78(10):1669-- 1675, October 1990.


Inductive Learning by Selection of Minimal Complexity.. - de Oliveira (1994)   (1 citation)  (Correct)

....functions (and therefore represent concepts) that require unbounded level networks of purely logic gates. For example, it has been shown that functions like multiple addition, multiplication, division and sorting can be implemented by polynomial size threshold circuits of small constant depth [93, 94]. In particular, compact two level threshold gate networks can represent many interesting concepts that require exponentially large two level Boolean networks. Extensive research in the field of neural networks has also created interest in algorithms for the synthesis and optimization of threshold ....

K. Y. Siu and J. Bruck. Neural computation of arithmetic functions. Proceedings of IEEE, 10:1669--1675, 1990.


Computational Complexity Of Neural Networks: A Survey - Orponen (1995)   (4 citations)  (Correct)

.... numbers can be computed by such networks in depth 6 PEKKA ORPONEN 2 [66, 72] the product of two n bit numbers can be computed in depth 3 [92] and analytic functions with a convergent rational power series (e.g. sin, cos, exp, log, sqrt) can all be approximated in bounded depth [82] cf. also [90]) It is therefore of great interest to consider also the following fixed depth sublevels of the class TC 0 individually: TC 0 d = ffunctions computable by threshold circuits of polynomial size and depth dg; c TC 0 d = ffunctions computable by majority circuits of polynomial size and depth ....

Siu, K.-Y., Bruck, J. Neural computation of arithmetic functions. Proc. of the IEEE 78 (1990), 1669--1675.


j2 Counters and Multiplication with Linear Threshold Logic - Vassiliadis, Cotofana   (Correct)

...., a summation device, S, computing F(X) and a threshold element, T , computing F (X) sgn(F(X) Given that threshold logic may be promising, it is of interest to investigate new schemes applicable to such a new technology. To this end a number of recent proposals regarding multiplications [SB90, HHK91, LB91a] and other computer based operations [SB90, SRK91, SBKH93, VB94, VBP94] have been developed that assume threshold rather than Boolean logic. We investigate threshold based networks from this prospective and develop cost effective small gate delay multipliers with pj2 counter structures. In ....

....element, T , computing F (X) sgn(F(X) Given that threshold logic may be promising, it is of interest to investigate new schemes applicable to such a new technology. To this end a number of recent proposals regarding multiplications [SB90, HHK91, LB91a] and other computer based operations [SB90, SRK91, SBKH93, VB94, VBP94] have been developed that assume threshold rather than Boolean logic. We investigate threshold based networks from this prospective and develop cost effective small gate delay multipliers with pj2 counter structures. In particular we propose new threshold logic based pj2 counters. Further, we ....

[Article contains additional citation context not shown here]

K. Y. Siu and J. Bruck. Neural Computation of Arithmetic Functions. Proc. IEEE, 78(10):1669--1675, October 1990.


Periodic Symmetric Functions, Serial Addition, and.. - Cotofana, Vassiliadis (1998)   (Correct)

No context found.

K. Y. Siu and J. Bruck, "Neural computation of arithmetic functions," Proc. IEEE, vol. 78, no. 10, pp. 1669--1675, Oct. 1990.


Serial Binary Multiplication with Feed-Forward Neural Networks - Cotofana, Vassiliadis (1999)   (Correct)

No context found.

K. Y. Siu and J. Bruck. Neural Computation of Arithmetic Functions. Proc. IEEE, 78(10):1669--1675, October 1990.

First 50 documents

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC