Scott McFarling. Combining branch predictors. Technical Report TN-36m, Digital Western Research Laboratory, June 1993.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....As pipelines deepen and the number of instructions issued per cycle increases, the penalty for a misprediction increases and the benefit of accurate branch prediction increases. Recent efforts to improve branch prediction focus primarily on eliminating aliasing in two level adaptive predictors [22, 20, 28, 6], which occurs when two unrelated branches destructively interfere by using the same prediction resources. We take a different approach one that is largely orthogonal to previous work by improving the accuracy of the prediction mechanism itself. Our work builds on the observation that all ....

....counter is taken as the prediction. Once the branch outcome is known, the counter is incremented if the branch is taken, and decremented otherwise. An important problem in twolevel predictors is aliasing [25] and many of the recently proposed branch predictors seek to reduce the aliasing problem [22, 20, 28, 6] but do not change the basic prediction mechanism. Given a generous hardware budget, many of these two level schemes perform about the same as one another [6] Most two level predictors cannot consider long history lengths, which becomes a problem when the distance between correlated branches is ....

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Scott McFarling. Combining branch predictors. Technical Report TN-36m, Digital Western Research Laboratory, June 1993.

....2 bit staturating counters which is indexed by the program counter of the branch. The gshare branch predictor is an 8K entry table with 2 bit saturating counters indexed by the program counter xor ed with the taken not taken branch history of 12 past branches. The hybrid branch predictor [18] combines the bimodal and the gshare predictor by choosing among them dynamically. This is done using a meta predictor that is indexed by the branch address and contains 8K 2 bit saturating counters. Data cache miss rates. Data cache miss rates were measured for five different cache ....

S. McFarling. Combining branch predictors. Technical Report WRL TN-36, Digital Western Research Laboratory, June 1993.

....on improving the accuracy of GAg branch predictors. Yeh and Patt taxonomize twolevel branch predictors using a three letter naming 3. 4 Aliasing in Branch Predictors Recent efforts to improve branch prediction focus primarily on eliminating aliasing in variants of two level adaptive predictors [18, 16, 22, 7], which occurs when two unrelated branches destructively interfere by using the same prediction resources. With a GAg or GAs pre dictor, two unrelated branches with the same branch his tories might lead to different branch outcomes. If these branches map to the same entry in the PHT, they will ....

Scott McFarling. Combining branch predictors. Technical Report TN-36m, Digital Western Research Laboratory, June 1993.

....documented branch predictor in an existing microarchitecture. Gshare. Based on the idea of two level adaptive branch prediction [20] gshare indexes a pattern history table (PHT) of two bit saturating counter with the exclusive OR of a global history shift register and the branch program counter [16]. The high bit of the corresponding counter is taken as the prediction. A value of 1 means predict taken, while 0 means predict not taken. When a branch is executed, the history register and branch PC are again combined and used to index the PHT. The corresponding counter is incremented if the ....

....The outcome of the branch is shifted into the history register, which records a 1 for taken and 0 for not taken. We model a gshare predictor with 16K entries. Hybrid Predictor. Hybrid predictors combine two or more branch predictors to increase accuracy. We use a McFarling style hybrid predictor [16] of the type implemented for the Alpha 21264 [11] This predictor uses two branch prediction components: a 4K entry GAg [21] predictor indexed by a global history shift register, and a 1Kentry PAg predictor, indexed by one of 1024 per branch 10 bit history shift registers, combined with a 4K entry ....

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Scott McFarling. Combining branch predictors. Technical Report TN-36m, Digital Western Research Laboratory, June 1993.

....As pipelines deepen and the number of instructions issued per cycle increases, the penalty for a misprediction increases and the benefit of accurate branch prediction increases. Recent efforts to improve branch prediction focus primarily on eliminating aliasing in two level adaptive predictors [22, 20, 28, 6], which occurs when two unrelated branches destructively interfere by using the same prediction resources. We take a different approach one that is largely orthogonal to previous work by improving the accuracy of the prediction mechanism itself. Our work builds on the observation that all ....

....counter is taken as the prediction. Once the branch outcome is known, the counter is incremented if the branch is taken, and decremented otherwise. An important problem in twolevel predictors is aliasing [25] and many of the recently proposed branch predictors seek to reduce the aliasing problem [22, 20, 28, 6] but do not change the basic prediction mechanism. Given a generous hardware budget, many of these two level schemes perform about the same as one another [6] Most two level predictors cannot consider long history lengths, which becomes a problem when the distance between correlated branches is ....

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Scott McFarling. Combining branch predictors. Technical Report TN-36m, Digital Western Research Laboratory, June 1993.

....from misspeculated loads, which re executes the instructions which are dependent (directly or indirectly) on the misspeculated load. The branch predictor is a hybrid predictor with a 4K meta predictor choosing between a 4K bimodal predictor and an 8 bit gshare that indexes into a 4K predictor [6]. The branch target buffer contains 512 sets and has an associativity of 4. The return address stack contains four entries. The pipeline in front of the instruction window contains four stages: a fetch stage, a decode stage, a register renaming stage and a dispatch stage which inserts the ....

S. McFarling. Combining branch predictors. Technical Report WRL TN-36, Digital Western Research Laboratory, June 1993.

....the divide. Dynamic memory disambiguation and selective re execution to recover from misspeculated loads are modeled in our simulator. The branch predictor is a hybrid predictor with a 4K meta predictor choosing between a 4K bimodal predictor and an 8 bit gshare that indexes into a 4K predictor [10]. The branch target buffer contains 512 sets and has an associativity of 4. The return address stack contains eight entries. We considered two different memory subsystems in our evaluation section, a small and a large cache configuration. The small configuration has an 8KB direct mapped L1 ....

S. McFarling. Combining branch predictors. Technical Report WRL TN-36, Digital Western Research Laboratory, June 1993.

....of California, Berkeley frupak,drorg cs.berkeley.edu 1 Introduction Modern high performance architectures require extremely accurate branch prediction to overcome the performance limitations of conditional branches. Most current solutions employ a two level adaptive scheme [8] such as gshare [5] and bimode [4] The prediction mechanism uses a table of simple two bit counters chosen according to some history information and the branch address. In this project we explore predictors with more sophisticated prediction mechanisms based on arti cial intelligence methods. The problem of branch ....

....complexity. Then, we compare the neural net predictors to the enhanced perceptron predictors. In order for general neural nets to be justi able, they must perform signi cantly better than the simpler versions. For reference purposes, we compare the predictors against a traditional gshare predictor [5]. 1 w n 1 x 1 x 2 x n y w 0 w 1 w 2 Figure 1: A single layer perceptron We evaluate the di erent predictors on the SPEC95 integer benchmarks. We measure the miss rate and the learning rate of each predictor. The results of our experiments suggest that neural net predictors do not perform ....

S. McFarling. Combining Branch Predictors. Technical Report TN-36m, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining Branch Predictors. WRL Technical Note TN-36, Digital Western Research Laboratory, Palo Alto. June 1993.

....a considerable number of cycles is wasted executing the wrong instructions and restoring the processor state such that the correct path can be executed. Thus, branch predictors must be highly accurate to avoid mispredictions. Current techniques can achieve correct branch prediction rates of 95 [41], i.e. misprediction rates of 5 , but the high cost of recovering from mispredictions [12] remains one of the largest impediments to performance on current and future processors. Because of the large penalty of a branch misprediction, small improvements in accuracy can have a large impact on ....

....yield higher accuracy for two reasons: They allow the use of longer history lengths, and they reduce aliasing, which occurs when two unrelated branches destructively share the same hardware branch prediction resources. Indeed, much of the recent work has focused on methods for reducing aliasing [52, 41, 38, 57, 18]. With growing chip capacities, the focus of the research community on area and accuracy has led to large elaborate predictors, some of which require 16K to 64K byte structures [20] and to complex prediction schemes that add levels of logic to combat destructive aliasing [18, 38] Since dynamic ....

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Scott McFarling. Combining branch predictors. Technical Report TN-36m, Digital Western Research Laboratory, June 1993.

....available execution resources while the branch prediction is being computed, and is not scalable to situations where multiple branches are being predicted in the front end. 3 Our Solution: A Large, Fast gshare In this section, we present a highly accurate large branch predictor based on gshare [10] called gshare.fast that produces its prediction in a single cycle, uses the most recently updated history, and incurs no added penalty or complexity for the rest of the pipeline. We first describe the idea for predicting a single branch per cycle using a pipelined gshare, then discuss related ....

Scott McFarling. Combining branch predictors. Technical Report TN-36m, Digital Western Research Laboratory, June 1993.

....a considerable number of cycles is wasted executing the wrong instructions and restoring the processor state such that the correct path can be executed. Thus, branch predictors must be highly accurate to avoid mispredictions. Current techniques can achieve correct branch prediction rates of 95 [41], i.e. misprediction rates of 5 , but the high cost of recovering from mispredictions [12] remains one of the largest impediments to performance on current and future processors. Because of the large penalty of a branch misprediction, small improvements in accuracy can have a large impact on ....

....yield higher accuracy for two reasons: They allow the use of longer history lengths, and they reduce aliasing, which occurs when two unrelated branches destructively share the same hardware branch prediction resources. Indeed, much of the recent work has focused on methods for reducing aliasing [52, 41, 38, 57, 18]. With growing chip capacities, the focus of the research community on area and accuracy has led to large elaborate predictors, some of which require 16K to 64K byte structures [20] and to complex prediction schemes that add levels of logic to combat destructive aliasing [18, 38] Since dynamic ....

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Scott McFarling. Combining branch predictors. Technical Report TN-36m, Digital Western Research Laboratory, June 1993.

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Scott McFarling. Combining branch predictors. Technical Report TN-36m, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining branch predictors. Technical Report TN36m, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining branch predictors. Technical Report TN-36, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining branch predictors. Technical Report TN-36, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining branch predictors. Technical Report TN-36, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining branch predictors. Technical Report TN-36, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining branch predictors. Digital Western Research Laboratory, Technical Report TN-36, 1993.

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S. McFarling. Combining branch predictors. Technical Report TN-36, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining branch predictors. Technical Report TN-36, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining branch predictors. Technical Report WRL TN-36, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining branch predictors. Technical Report TN-36, Digital Western Research Laboratory, June 1993.

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S. McFarling. Combining Branch Predictors. Technical Report TN-36, Digital Western Research Laboratory, June 1993.

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S. McFarling, Combining Branch Predictors, Tech. Report TN-36, Digital Western Research Laboratory, Digital Equipment Corp., Palo Alto, Calif., 1993.

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