S. Rajamani and P. Viswanath, "A quantitative analysis of processorprogrammable logic interface," in Proc. IEEE Symp. FPGA for Custom Computing Machines, Apr. 1996, pp. 226--234. Home/Search Document Details and Download
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The Chimaera Reconfigurable Functional Unit - Scott Hauck Senior (1997) (48 citations) (Correct)
....to justify the hardware costs and extra complexities. All of these factors keep reconfigurable computing from entering the mainstream and drive up the cost and complexity of these systems. Initial work on integrating processors and reconfigurable logic has been done [1] 2] 5] 6] 8] 13] [18] [23] For example, the PRISC architecture allows the CPU to issue instructions to a reconfigurable array to optimize an application. However, these systems typically use standard FPGA architectures which were not designed specifically to optimize the needs of an integrated FPGA processor ....
S. Rajamani and P. Viswanath, "A quantitative analysis of processorprogrammable logic interface," in Proc. IEEE Symp. FPGA for Custom Computing Machines, Apr. 1996, pp. 226--234.
The Roles of FPGAs in Reprogrammable Systems - Hauck (1998) (25 citations) (Correct)
....and increases the external bandwidth requirements, since the configurations of the reprogrammable functional units must somehow be changed for different algorithms. While there has been some work done on reprogrammable functional units [French93, Albaharna94, DeHon94, Razdan94, Albaharna96, Rajamani96, Wittig96] there is still much left to do. While there has been some work on reprogrammable coprocessors and functional units for standard computer systems, by far the majority of reprogrammable systems have been multi FPGA systems. In section 5 we discuss many of the different multi FPGA system ....
S. Rajamani, P. Viswanath, "A Quantitative Analysis of Processor - Programmable Logic Interface", IEEE Symposium on FPGAs for Custom Computing Machines, 1996.
The Chimaera Reconfigurable Functional Unit - Scott Hauck (1997) (48 citations) (Correct)
....performance benefits to justify the hardware costs and extra complexities. All of these factors keep reconfigurable computing from entering the mainstream, and drive up the cost and complexity of these systems. There has been initial work done on integrating processors and reconfigurable logic [French93, Albaharna94, DeHon94, Razdan94a, Razdan94b, Albaharna96, Rajamani96, Wirthlin95, Wittig96]. However, these systems in general use standard FPGA architectures, architectures that have not been designed to effectively support the needs of integrated FPGA processor systems. Also, as we will show, there are significant opportunities for optimizing these systems by taking advantage of the ....
S. Rajamani, P. Viswanath, "A Quantitative Analysis of Processor - Programmable Logic Interface", IEEE Symposium on FPGAs for Custom Computing Machines , 1996.
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