D. Suk, S. Reddy, "A March Test for Functional Faults in Semiconductor Random Access Memories," IEEE Trans. on Comp., C-30, 1981, pp. 982-984.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....been proposed. In this BIST design, we implemented five most popular ones: 1) scan algorithm, 2) checkerboard algorithm, 3) horizontal march algorithm, 4) vertical march algorithm, and (5) multiple address selection algorithms. The details of the other algorithms are referred to the literature [10]. A primitive design reveals that the speed of a memory if(row = ROW 1 col = COL l) NEXT CELL; Fig. 9: Partial EFSM model for the pattern generator. BIST circuit is limited by the pattern generator, which is concisely modeled as a 42 state extended finite state machine (part of this EFSM ....

S. Suk and S.M. Reddy, "A March Test for Functional Faults in Semi-conductor Random-Access Memories", IEEE Trans. on Computers, C-30(12), pp. 982-985, 1981.

....short test time. Then, we consider fault models based on physical defects analysis [3,4] and show that the new tests are effective for these faults too. 2. Concept of march tests Many types of tests for RAMs have been proposed in the past. Currently, one family of the tests, called march tests [5,6], has proven to be superior for test time and simplicity of the algorithms. Key words: traditional RAM fault models, multiple linked faults, march tests, inductive fault analysis. A march test consists of a sequence of march elements. A march element consists of a sequence of operation applied to ....

....function when multiple cells are read) the conditions of Table 1 can be simplified. The simplified conditions are depicted in Table 2 [2] A memory cell with a transition fault (TF) fails to undergo at least one of the transitions 01( 0 ) or 1 0( 1 ) An inversion coupling fault (CF in ) [2,5 7] involves two cells i and j; the fault is sensitised by a transition write operation to a particular cell j. Cell j is called the coupling cell and inverts the contents of cell i, which is called the coupled cell. Two different CF ins can be recognized: the ; and the ; 3.3. Faults in the ....

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D.S Suk and S.M.Reddy, "A March Test for Functional Faults in Semiconductor Random-Access Memories", IEEE Trans. Computers, Vol. C-30, No.12, 1981, pp.982-985.

....coupling faults, therefore, are not detected by the march tests. In this article, we present the test and testability strategies for such hard to detect open defects. 1 Introduction Random Access Memories (RAMs) are often tested by carrying out so called March Tests over all its addresses [1]. A march test consists of individual march elements. A march element traverses through all RAM addresses and performs a specified combination of read and write operations. For example, in a typical march element, each RAM address location is first read and then the complemented data value is ....

D. S. Suk, S. M. Reddy, "A March Test for Functional Faults in Semiconductor Random Access Memories," IEEE Transactions on Computers, Vol. C-30, no. 12, Dec. 1981, pp.

....CFin (inversion coupling fault) CFid (idempotent coupling fault) CFst (state coupling fault) CFdyn (dynamic 2 coupling fault) as well as SAF, AF and TF. March C is an optimum test obtained from the March C test [7] by reducing march element M3 which does not affect the fault coverage. March A [9] is a well known algorithm to detect linked CFid. It is the shortest algorithm to detect AF, SAF, linked CFid, and unlinked TF. March Y 2 is an extension of march X, a r1 has been added to M 1 and a r0 to M 2 . March Y detects AF, SAF, CFin, and TF linked with CFin. March B [9] detects SAF, ....

....March A [9] is a well known algorithm to detect linked CFid. It is the shortest algorithm to detect AF, SAF, linked CFid, and unlinked TF. March Y 2 is an extension of march X, a r1 has been added to M 1 and a r0 to M 2 . March Y detects AF, SAF, CFin, and TF linked with CFin. March B [9] detects SAF, TF, AF, CFid, CFin, and it is an irredundant test set. The second block of Table 5 summarizes several march algorithms. 3.3. Comparison of memory test algorithms As shown in Table 5, the march test algorithms have relatively shorter testing times compared with traditional test ....

D. S. Suk and S. M. Reddy. A March Test for Functional Faults in Semiconductor Random--Access Memories. IEEE Trans. Computers, C-30(12):982--985, 1981.

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D. Suk, S. Reddy, "A March Test for Functional Faults in Semiconductor Random Access Memories," IEEE Trans. on Comp., C-30, 1981, pp. 982-984.

No context found.

D.S. Suk and S.M. Reddy, "A March Test for Functional Faults in Semiconductors Random-Access Memories", IEEE Trans. on Computers, C-30(12), pp. 982-985, 1981.

No context found.

D.S. Suk and S.M. Reddy, "A March Test for Functional Faults in Semiconductor Random-Access Memories," IEEE Trans. on Computers, vol. C30, no. 12, pp. 982--985, 1981.

No context found.

D.S. Suk and S.M. Reddy, "A March Test for Functional Faults in Semiconductors Random-Access Memories," IEEE Trans. on Comp.,vol. C-30, no. 12, pp. 982--985, 1981.

No context found.

D.S. Suk and S.M. Reddy, "A March Test for Functional Faults in Semiconductors Random-Access Memories", IEEE Transactions on Computers, C-30(12), pp. 982-985, 1981.

No context found.

D.S. Suk and S.M. Reddy, "A March Test for Functional Faults in Semiconductors Random-Access Memories", IEEE Trans. on Comp., C-30(12), pp. 982-985, 1981.

No context found.

D. S. Suk and S. M. Reddy, "A march test for functional faults in semiconductor random access memories," IEEE Trans. Comput., vol. C30, pp. 982--985, Dec. 1981.

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