| Anant Agarwal, Beng-Hong Lim, David Kranz, and John Kubiatowicz. APRIL: A Processor Architecture for Multiprocessing. Computer Architecture News, 18(2):104--114, June 1990. Proc. 17th International Symposium on Computer Architecture. |
....in the processor itself, such as that prototyped in the Denelcor HEP[29] Some current RISC processors, such as the AMD 29000[16] and the Sun SPARC[12] provide support for multiple contexts in the form of multiple register banks, and TID tagging of cache and TLB entries. The APRIL project at MIT[1] is investigating the use of multiple register banks in just this way using a modified SPARC processor. Tests: TM TM Message Singe CPU Compute Time Cycle Only Time Time One Pair Time in sec. 18.1 38.3 136 of Tasks Compute Cost 100 47 13 Two Pairs Time in sec. 44.4 113.8 343.3 of Tasks ....
Anant Agarwal, Beng-Hong Lim, David Kranz, and John Kubiatowicz. APRIL: A Processor Architecture for Multiprocessing. Computer Architecture News, 18(2):104--114, June 1990. Proc. 17th International Symposium on Computer Architecture.
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