J.E. Bennett and M. Flynn. Reducing cache miss rates using prediction caches. Technical Report CSL-TR-96-707, Stanford University, Computer Systems Laboratory, October 1996.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....usage of system resources. The flexibility introduced by using a weighting function can be used to include even application induced replacement criteria. This will allow the results of Cao[3] 4] to be integrated. To further improve cache performance other methods, such as prefetching (see Bennett[13]) should be considered as well. References [1] B. Reed, D.D. Long, Analysis of caching Algorithms for distributed file systems, Operating Systems Review, Vol. 30, No. 3, 1996 [2] V. Phalke, Modeling and Managing Program ....

J. Bennett, M. Flynn, Reducing cache miss rates using prediction caches, Technical report CSL-TR-96707, Stanford University, 1996

....and Yeh and Patt[13] proposed speculative instruction prefetching based on branch prediction. Sazeides and Smith applied the computational and context based prediction to data values[3] Predicting cache misses in uni processor system has been widely researched in recent years. Bennett and Flynn[7] used data based cache miss history table to drive steam buffer and victim cache to have the system adaptive to different memory access patterns. Tyson et al. 14] proposed instruction based prediction to bypass selectively the cache for loads that are responsible for most cache misses. Cache ....

James E. Bennett and Michael J. Flynn, "Reducing Cache Miss Rates Using Prediction Caches", Technical report CSL-TR-96-707, Computer Systems Laboratory, Stanford University, Oct. 1996. 17

....and stride based prefetching do not have much impact on most SPEC92 programs, as these techniques stress bus bandwidth. In another study, Bennett and Flynn proposed a prediction cache that dynamically adapts between stream buffer and victim cache functionality based on program miss patterns [3]. The prediction cache dynamically adjusts the stream buffer prefetching distance based on the late prefetch pattern of the program. Although all of the above studies use aggressive ILP uniprocessors, they do not focus on the impact of ILP on prefetching, and so do not relate the results of their ....

J. E. Bennett and M. J. Flynn. Reducing Cache Miss Rates Using Prediction Caches. Stanford University, CSL-TR-96707, 1996.

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J.E. Bennett and M. Flynn. Reducing cache miss rates using prediction caches. Technical Report CSL-TR-96-707, Stanford University, Computer Systems Laboratory, October 1996.

....stride prediction methodology must be effective for the software prefetching to perform well. Compress is an example of an application that is not amenable to stride prediction, while ijpeg and mpeg play exhibit regular data access behav ior that is amenable to stride prediction. 19] and [20] investigate hardware stride prediction for a number of common benchmarks on a dynamically scheduled processor model. That work confirms similarly poor performance for compress. Based on this work we hypothesize that scientific applications such as linpack, wave, or fft will perform well using the ....

James E. Bennett and Michael J. Flynn, "Reducing cache miss rates using prediction caches," Tech. Rep. CSL-TR96 -707, Stanford University, Computer Systems Laboratory, October 1996.

....stride prediction methodology must be effective for the software prefetching to perform well. Compress is an example of an application that is not amenable to stride prediction, while ijpeg and mpeg play exhibit regular data access behavior that is amenable to stride prediction. 19] and [20] investigate hardware stride prediction for a number of common benchmarks on a dynamically scheduled processor model. That work confirms similarly poor performance for compress. Based on this work we hypothesize that scientific applications such as linpack, wave, or fft will perform well using the ....

James E. Bennett and Michael J. Flynn, "Reducing cache miss rates using prediction caches," Tech. Rep. CSL-TR96 -707, Stanford University, Computer Systems Laboratory, October 1996.

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