J. F. Palmer, "The NCUBE Family of High Performance Parallel Computer Systems, " Third Conference on Hypercube Concurrent Computers and Applications, January 1988, pp. 847--851. 26  Home/Search   Document Not in Database   Summary   Related Articles   Check

....for data movement between localities. Seamless [FiC92c, FiC92d] is a latency tolerant RISC based multiprocessor architecture based on the data movement programming model [FiC92a] In Seamless, the concept of a multicomputer (e.g. the iPSC 860 [Int91b, HeG90] CM5 [Thi91] and nCUBE 2 [Pal88, Tro89]) is extended by adding a second processor, the Locality Manager(LM) to each processing element. In Seamless, a processing element this is referred to as a locality . While the idea of adding a second processor to handle communications is not unique (e.g. the Intel Paragon [Int91a] Seamless ....

J. F. Palmer, "The NCUBE Family of High Performance Parallel Computer Systems, " Third Conference on Hypercube Concurrent Computers and Applications, January 1988, pp. 847--851. 26

....Since the SHRIMP I network interface supports both traditional message passing and virtual memory mapped communication, it allows user programs to optimize their common cases. 6 Related Work The traditional network interface design is based on DMA data transfer. Recent examples include the NCUBE [14], iPSC 2 [13] and iPSC 860. In this scheme an application sends messages by making operating system calls to initiate DMA data transfers. The network interface initiates an incoming DMA data transfer 8 when a message arrives and interrupts the local processor when the transfer has finished so it ....

John Palmer. The NCUBE family of high-performance parallel computer systems. In Proceedings of 3rd Conference on Hypercube Concurrent Computers and Applications, pages 845--851, January 1988.

....includes 261 instructions on the fast path to receive and dispatch a message, plus the cost of a system call and a DMA receive interrupt. 6 Related Work The traditional method of designing network interfaces for multicomputers is based on DMA data transfer. Recent examples include the NCUBE [24], iPSC 2 [23] and iPSC 860. The network interface designs of these machines are very similar. An application sends messages by making operating system calls to initiate DMA data transfers. The network interface initiates an incoming DMA data transfer when a message arrives and interrupts the local ....

John Palmer. The NCUBE family of highperformance parallel computer systems. In Proceedings of 3rd Conference on Hypercube Concurrent Computers and Applications, pages 845--851, January 1988.

....position have a direct link connecting them. The ancestor of all contemporary hypercubes is the Cosmic Cube built at Caltech in the early 80s [513] A number of commercial offerings have been made since then, the most enduring of which are the iPSC series from Intel [28] and the nCUBE machines [258, 443, 174]. Both provide partitioning as described below. Many hypercube applications are specifically tailored to the topology (e.g. 41, 495, 475] Therefore if an application is to run on a partition of the machine, that partition must itself be a hypercube, albeit of a smaller dimensionality 4 . It ....

J. F. Palmer, "The NCUBE family of high performance parallel computer systems". In 3rd Conf. Hypercubes, Concurrent Comput., & Appl., vol. I, pp. 847--851, Jan 1988. 152

....Since both SHRIMP network interfaces support traditional message passing and virtual memory mapped communication, they allow user programs to optimize for common cases. 7 Related Work The traditional network interface design is based on DMA data transfer. Recent examples include the NCUBE [16], iPSC 2 [1] and iPSC 860 [11] In this scheme an application sends messages by making operating system calls to initiate DMA data transfers. The network interface initiates an incoming DMA data transfer when a message arrives and interrupts the local processor when the transfer has finished so ....

John Palmer. The NCUBE family of highperformance parallel computer systems. In Proceedings of 3rd Conference on Hypercube Concurrent Computers and Applications, pages 845--851, January 1988.

....position have a direct link connecting them. The ancestor of all contemporary hypercubes is the Cosmic Cube built at Caltech in the early 80s [308] A number of commercial offerings have been made since then, the most enduring of which are the iPSC series from Intel [17] and the nCUBE machines [158, 271, 100]. Both provide partitioning as described below. Many hypercube applications are specifically tailored to the topology. Therefore if an application is to run on a partition of the machine, that partition must itself be a hypercube, 2 It is k=2 stages rather than k stages because 4 Theta 4 ....

J. F. Palmer, "The NCUBE family of high performance parallel computer systems". In 3rd Conf. Hypercubes, Concurrent Comput., & Appl., vol. I, pp. 847--851, Jan 1988.

....depending on the memory access pattern of an algorithm as in the case of shared memory machines. Thus there is a tendency to believe that message passing architectures may be more scalable than its architectural rival as is evident from the number of commercially available message passing machines [4, 10, 14]. Yet, there is considerable interest in the architectural community toward realizing scalable shared memory multiprocessors. Indeed the natural progression from sequential programming to shared memory style parallel programming is one of the main reasons for such a trend. KSR 1 is a shared memory ....

J. F. Palmer and G. Fox. The NCUBE family of high-performance parallel computer systems. In Third Conference on Hypercube Concurrent Computers and Applications, pages 847--51 vol.1, 1988.

....within a partition. Since the application must build packet headers, message passing overhead is still hundreds of CPU instructions. Old multicomputers have traditional network interfaces and thus their implementations of the NX message passing library manage communication buffers in the kernel [37, 35]. Current machines like the Intel Paragon and Meiko CS 2 attack software overhead by adding a separate processor on every node just for message passing [34, 25, 23, 22, 20] This approach, however, does not eliminate the overhead of the software protocol on the message processor, which is still ....

John Palmer. The NCUBE Family of HighPerformance Parallel Computer Systems. In Proceedings of 3rd Conference on Hypercube Concurrent Computers and Applications, pages 845--851, January 1988.

....therefore drives the performance of short messages. 2.1.1 OS Level DMA Based Interfaces The first category of network interfaces which we consider consists of parallel processors that relegate message handling to the DMA interface under the operating system s control. Examples include the NCUBE [Pal88] the iPSC 2 [Bra88] and the SP 2 [FHP 94] At the hardware level, these machines send and receive messages by initiating a DMA transfer between main memory and the node s network channel. At the software level, the sending of a message is accomplished by writing the message into the memory ....

....DMA interfaces are typically associated with long messages, since a processor is unlikely to generate all the fields of a long outgoing message in registers or to operate on all the fields of a long incoming message in registers. Although existing DMA interfaces are implemented at kernel level [Pal88, Bra88, FHP 94, ACD 91] An efficient DMA interface, such as the one in Alewife [ACD 91] could be incorporated into our NI at user level to handle long messages. Instead of reducing the latency of a message, approaches such as fast context switching and prefetching aim at hiding the ....

John F. Palmer. The NCUBE family of high-performance parallel computer systems. In Proc. of the Third Conf. on Hypercube Concurrent Computers and Applications, pages 847--851, January 1988.

....overhead includes 261 instructions on the fast path to receive and dispatch a message, plus the cost of a system call and a DMA receive interrupt. 6 Related Work The traditional method of designing network interfaces for multicomputers is based on DMA data transfer. Examples include the NCUBE [22], iPSC 2 and iPSC 860 [21] The network interface designs of these machines are very similar. An application sends messages by making operating system calls to initiate DMA data transfers. The network interface initiates an incoming DMA data transfer when a message arrives and interrupts the local ....

John Palmer. The NCUBE family of highperformance parallel computer systems. In Proceedings of 3rd Conference on Hypercube Concurrent Computers and Applications, pages 845--851, January 1988.

....interfaces. We review each category separately. 1.1 OS Level DMA Based Interfaces The first category of network interfaces which we consider consists of parallel processors that relegate message handling to the DMA interface under the operating system s control. Examples include the NCUBE [Pal88] and the iPSC 2 [Bra88] At the hardware level, both machines send and receive messages by initiating a DMA transfer between main memory and the node s network channel. At the software level, the sending of a message is accomplished by writing the message into the memory and executing a send ....

John F. Palmer. The NCUBE Family of HighPerformance Parallel Computer Systems. In Proc. of the Third Conf. on Hypercube Concurrent Computers and Applications, pages 847-- 851, January 1988.

....Extrapolation of the curves indicates that this factor will be about 15 for a 1024 processor system. 9 Related Work and Discussion We discussed the direct predecessor to the T3E in Section 2. This section discusses some other related work. Early message passing machines, such as the NCUBE [37] or iPSC 2 [5] required operating system calls to perform any communication between processors. More recent systems have provided user level messaging facilities. The Connection Machine CM 5, for example, provides a user level network interface via memory mapping [46] Message receipt, however, ....

Palmer, J. F., "The NCUBE family of high-performance parallel computer systems," Proc. Third Conference on Hypercube Concurrent Computers and Applications, pp. 847-851, January 1988.

....depending on the memory access pattern of an algorithm as in the case of shared memory machines. Thus there is a tendency to believe that message passing architectures may be more scalable than its architectural rival as is evident from the number of commercially available message passing machines [5, 11, 15]. Yet, there is considerable interest in the architectural community toward realizing scalable shared memory multiprocessors. Indeed the natural progression from sequential programming to shared memory style parallel programming is one of the main reasons for such a trend. KSR 1 is a shared memory ....

J. F. Palmer and G. Fox. The NCUBE family of high-performance parallel computer systems. In Third Conference on Hypercube Concurrent Computers and Applications, pages 847--51 vol.1, 1988.

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J. Palmer, "The NCUBE family of high-performance parallel computer systems," in Proceedings of 3rd Conference on Hypercube Concurrent Computers and Applications, pp. 845--851, Jan. 1988.

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