| P. Graham and B. Nelson, "A hardware genetic algorithm for the traveling salesman problem on splash 2," in Proc. 5th Int. Workshop Field Programmable Logic Applicat., Oxford, U.K., Aug. 1995, pp. 352--361. |
....the later uses it as an adaptive mechanism. However, the line between the two is gray. EHW is fundamentally different from the hardware implementation of EA s, in which the hardware architecture does not change and is used to implement EA functions, such as selection, recombination, and mutation [3] [5] The main Manuscript received April 21, 1997; revised January 15, 1998. X. Yao is with the Computational Intelligence Group, School of Computer Science, University College, The University of New South Wales, Australian Defence Force Academy, ACT 2600 Canberra, Australia (e mail: ....
P. Graham and B. Nelson, "A hardware genetic algorithm for the traveling salesman problem on splash 2," in Proc. 5th Int. Workshop Field Programmable Logic Applicat., Oxford, U.K., Aug. 1995, pp. 352--361.
....applied to many hard optimization problems. However, the GA process is time consuming. For many real world applications, GA can run for days, even when it is executed on a highperformance workstation. Due to the extensive computation of GA, a myriad of hardware based GAs has been put forward [Scott95, Graham95, Sitkoff95, Bland98, Kajitani98, Yoshida99, Shackleford00]. Here we cite only the more recent works. Most of the cited works present the hardware accelerating the Simple GA, except [Kajitani98, Yoshida99, Shackleford00] that are Steady state GA. The impressive speedups are depicted in Table 2. However, complex and expensive hardware is employed to attain ....
....Yoshida99, Shackleford00] that are Steady state GA. The impressive speedups are depicted in Table 2. However, complex and expensive hardware is employed to attain the speedups. For example, SPLASH2 uses a collection of processor array boards connected to Sun Sparc workstation via an interface card [Graham95]. Another example is the ARMSTRONG, which is a MIMD multicomputer with reconfigurable resources [Sitkoff95] It consists of an array of processor boards. Each board consists of microprocessor, memory, and FPGAs. Those machines are regarded as reconfigurable computers, developed for general ....
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Graham, P. and Nelson, B. "A Hardware Genetic Algorithm for the Traveling Salesman Problem on SPLASH 2," in Proc. of the 5th Int. Workshop on Field Programmable Logic and Applications, pp. 352-361, 1995.
....This makes Splash a good candidate for linear systolic applications, which stress neighbor to neighbor communications. Because of limited routing resources Splash has not proven as effective at implementing multi chip applications that are not linear systolic, though some progress has been made [GN95]. The actual Splash platform consists of a board with 16 Xilinx 4010 chips for computation arranged in a linear systolic array. One additional 4010 is used for system control. Each computation FPGA has a 36 bit connection to its two nearest neighbors and to a local 512 Kbyte memory (16 bit word ....
P. Graham and B. Nelson, "A Hardware Genetic Algorithm for the Traveling Salesman Problem on Splash 2", in W. Moore and W. Luk, editors, FieldProgrammable Logic and Applications, pages 352-361, Oxford England, August 1995, Springer Verlag.
....[49] Fukuda, Toshio, 58, 88] Fuquay, D Ann, 157] Gambardella, Luca M. 69] Gammack, John G. 117] Garigliano, Roberto, 141] Gause, Donald C. 21] Gen, Mitsuo, 23] Gold, S onke Sonnich, 150] Goldberg, David E. 123] Gopal, Rajeev, 124] Gorges Schleuter, Martina, 71] Graham, Paul, [35] Grefenstette, John J. 124] Guan, Shanguchuan, 125, 126, 136] Gucht, Dirk Van, 124, 128, 154] Guertin, Fran cois, 62] Gus eld, D. 65] Han, Seung Kee, 47] Haneda, H. 84] Hilliard, M. R. 135] Holland, J. R. C. 127] Homaifar, Abdollah, 125, 126, 136] Hoos, H. 78] Horng, ....
....V. V. 59] Mizuno, Takafumi, 44] Mokhtar, Mazen Moein, 99, 100] Montenegro, Anselmo A, 39] Moon, Byung Ro, 15] Moon, Byung Ro, 22] M uhlenbein, Heinz, 138, 139] Murga, R. H. 93] Murga, Roberto H. 60] Napierala, G. 140] Narihisa, H. 85] Nebro, Antonio, 32] Nelson, Brent, [35] N emec, Viktor, 61] Nettleton, David John, 141] Nevalainen, Olli, 73] Nishikawa, Yoshikazu, 24] Nobue, A. 27] Nurnberg, H. T. 74] Nygard, Kendall E. 142, 143] Ochi, Luiz S. 39, 96] Okada, D. 84] Oliver, I. M. 127] Ono, Isao, 161] Opaterny, Thilo, 150] O smera, Pavel, 48, ....
[Article contains additional citation context not shown here]
Paul Graham and Brent Nelson. A hardware genetic algorithm for the traveling salesman problem on Splash 2. In ?, editor, Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications, pages 352-361, Oxford, UK, 29. August-1. September 1995. Springer-Verlag, Berlin. * [168] CCA 13887/97 ga95aGraham.
....326, 121, 544, 545, 761, 762] Goldberg, Robert, 106] Goldstein, Richard A. 706] Golub, M. 54] Gong, W. B. 298] Goodman, Erik D. 361, 174, 436] G o os, Janne, 295] Gorges Schleuter, Martina, 546, 547] Gotesman, M. 281] Gottlieb, J. 71] Govindarajan, Sridhar, 706] Graham, Paul, [405, 438] Gravel, Marc, 749] Greenwell, R. N. 636] Greenwood, Garrison W. 294] Grefenstette, John J. 524, 548, 122, 549, 582] Grosberg, Alexander Yu. 823] Gruau, Fr ed eric C. 55] Gultyaev, Alexander P. 419] Gupta, Mahesh C. 772] Gupta, Yash P. 772] Gutierrez, D. 329] G uvenir, H. ....
....Na, KyungMin, 30] Nagao, Tomoharu, 80] Nakano, Ryohei, 722, 207] Nam, Dong Kyung, 312] Nandi, S. 231] Nang, Jongho, 442] Nara, Koichi, 581] Narayanaswamy, S. 31] Narihisa, H. 228] Nash, H. H. 426] Naumann, A. 487] Ndeh Che, F. 203] Negoita, Mircea Gh. 675] Nelson, Brent, [405, 438] Nelson, K. M. 377] Nelson, Kevin M. 44] N emec, Viktor, 445] Nettleton, David John, 254] Neubauer, Andr e, 43] Neubauer, A. 676, 679] Neves, J. 376] Nguyen, Khanh V. 219] Niemi, Mikko, 826] Niesse, John Arthur, 99, 102] Nishihira, Tetsuro, 709] Nishikawa, Y. 300] ....
[Article contains additional citation context not shown here]
Paul Graham and Brent Nelson. A hardware genetic algorithm for the traveling salesman problem on Splash 2. In ?, editor, Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications, pages 352-361, Oxford, UK, 29. August-1. September 1995. Springer-Verlag, Berlin. * [490] CCA 13887/97 ga95aGraham.
.... pattern recognition in high energy physics [Hgl95] Monte Carlo algorithms for statistical physics [Monaghan93, Cowen94] second level triggers for particle colliders [Moll95] and Heat and Laplace equation solvers [Vuillemin96] general algorithms such as the Traveling Salesman Problem [Graham95] Monte Carlo yield modeling [Howard94b] genetic optimization algorithms [Scott95, Graham96] region detection and labeling [Rachakonda95] stereo matching for stereo vision [Vuillemin96] hidden Markov Modeling for speech recognition [Schmit95] and genetic database searches [Lopresti91, ....
P. Graham, B. Nelson, "A Hardware Genetic Algorithm for the Traveling Salesman Problem on Splash 2", in W. Moore, W. Luk, Eds., Lecture Notes in Computer Science 975 - Field-Programmable Logic and Applications, London: Springer, pp. 352-361, 1995.
....if conventional crossover and mutation operators are used. This is because regular (or uniform) crossover, if it changes anything, will create two invalid tours, i.e. some cities will appear more than once and some will not appear at all. Thus much work in applying GAs to the TSP (e.g. 1] [44], 45] involve the use of special crossover operators that preserve the validity of tours. This method can be used in the HGA but requires modification of the CMM. In lieu of this, conventional crossover operators can be used in conjunction with a special encoding of the population members. One ....
.... Algorithm Extensions The genetic algorithm side of this work could be extended by implementing other genetic algorithm operators such as uniform crossover [51] 52] multi point crossover (allowing for 2 parents) and inversion [1] Permutation preserving crossover and mutation operators [1] [44], 45] could be implemented for constrained problems such as the TSP (Section V D) Additionally, the CMM could be parameterized to respect the boundaries of bit groups, i.e. only permit crossover at certain locations. This would be useful in preventing invalid strings in the generalized FPGA ....
[Article contains additional citation context not shown here]
P. Graham and B. Nelson, "A hardware genetic algorithm for the traveling salesman problem on Splash 2," in 5th International Workshop on Field-Programmable Logic and its Applications, August 1995, pp. 352--361, http://splish.ee.byu.edu/.
....problems if conventional crossover and mutation operators are used. This is because regular (or uniform) crossover, if it changes anything, will create two invalid tours, i.e. some cities will appear more than once and some will not appear at all. Thus much work in applying GAs to the TSP (e.g. [20, 22]) involve the use of special crossover operators that preserve the validity of tours. This method can be used in the HGA but requires modification of the CMM. In lieu of this, conventional crossover operators can be used in conjunction with a special encoding of the population members. One such ....
....to extend the design of Section 3, many of which require only simple modifications to the VHDL code. First, other genetic algorithm operators could be implemented, including uniform crossover [48] multi point crossover, and inversion [20] Permutation preserving crossover and mutation operators [20, 22] could be implemented for constrained problems such as the TSP. Additionally, the CMM could be parameterized to respect the boundaries of bit groups, i.e. only permit crossover at certain locations. This would be useful in preventing invalid strings in the generalized FPGA partitioning (Section ....
[Article contains additional citation context not shown here]
P. Graham and B. Nelson. A hardware genetic algorithm for the traveling salesman problem on Splash 2. In 5th International Workshop on Field-Programmable Logic and its Applications, pages 352--361, August 1995. http://splish.ee.byu.edu/.
.... research and commercial platforms that utilize programmable logic as an accelerator or processing engine have been proposed[4, 5, 12, 15] The majority of research on using the devices for computing has focused on the issues of mapping various well known algorithms to reconfigurable hardware[8], device technology[6] resource management[9] hardware software co design[11] and to some extent, programming models[10] Very little attention, in fact none that we are aware of, has been paid to the security models for these devices. In fact, the connotation of security in the FPGA community ....
P. Graham and B. Nelson. A Hardware Genetic Algorithm for the Traveling Salesman Problem on SPLASH 2. In Proceedings of FPL'95, pages 352--361, September 1995.
....while the later uses it as an adaptive mechanism. However, the line between the two is grey. EHW is fundamentally different from the hardware implementation of EAs, where the hardware architecture does not change and is used to implement EA functions such as selection, recombination and mutation [3, 4, 5]. The main motivation for hardware implementation of EAs is to speed up the execution of EA functions. Such speed up, however, does not necessarily imply a faster EA application because it does not speed up fitness evaluation which is often the most time consuming part of an EA application. ....
P. Graham and B. Nelson, "A hardware genetic algorithm for the traveling salesman problem on splash 2," in Proc. of the 5th Int. Workshop on Field Programmable Logic and Applications, Oxford, England, pp. 352--361, August 1995.
....is specialization. The two forms of specialization discussed were parallelism and efficiency. The hardware can frequently be specialized to take advantage of the inherent parallelism available in the algorithm as well as implement only what is needed for the application. As was mentioned in [GN95] and [GN96] the implementation features which account for most of the hardware s performance advantage are: ffl Parallelism Fine grain parallelism Coarse grain parallelism ffl Efficiency Hard wired control Address Generation Branching Function call overhead Memory ....
P. Graham and B. Nelson. A hardware genetic algorithm for the traveling salesman problem on Splash 2. In W. Moore and W. Luk, editors, Field-Programmable Logic and Applications, pages 352--361, Oxford, England, August 1995. Springer.
....as a 3X speedup in other sections of the algorithm. Finally, memory hierarchy inefficiencies in the software (cache misses and paging) and coarse grained parallelism in the hardware are each shown to have lesser effect on the performance difference between the implementations. 1 Introduction In [1] we reported on the development of a genetic algorithm for execution on Splash 2 [2] which This work was supported by ARPA CSTO under contract number DABT63 94 C 0085 under a subcontract to National Semiconductor we named SPGA . In comparing the performance of SPGA to an equivalent software ....
....the salesman the shorter the path through the cities, the more fit the solution is. 1.2.1 A Hardware GA Processor In our hardware implementation, a basic GA processing unit consists of four FPGA s and associated memories, as shown in Figure 1. This simple four FPGA implementation was shown in [1] to outperform a workstation and is the focus of our analysis here 1 . Figure 1 indicates the function performed by each chip in the processor s pipeline. The initial population is placed in the memories of all four chips. During operation, FPGA 1 selects pairs of solutions to propagate into the ....
[Article contains additional citation context not shown here]
P. Graham and B. Nelson, A hardware genetic algorithm for the traveling salesman problem on Splash 2, In W. Moore and W. Luk, editors, FieldProgrammable Logic and Applications, pages 352-- 361, Oxford, England, August 1995. Springer.
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