| Shimizu, T., Horie, T. and Ishihata, H. (1992) Low-latency message communication support for the AP1000. In Proceedings of the International Symposium on Computer Architecture, pp. 288--97. |
....as the SYMPAL compiler itself and Nbody simulations is included. Keywords: Object oriented programming, concurrency, functional programming, efficiency, implicit programming Large scale machines, capable of executing thousands of processes in parallel, have already become commercially available (Shimizu et al. 1992, TM Corporation 1991) Writing explicit parallel programs that efficiently exploit the power of these machines is a highly complicated task; programmers must extract large amounts of parallelism in their programs and correctly manage the communication and synchronization among a vast number of ....
Shimizu, T., Horie, T. and Ishihata, H. (1992) Low-latency message communication support for the AP1000. In Proceedings of the International Symposium on Computer Architecture, pp. 288--97.
....Clearly, register to register versions give significant benefits for small transfers; however memory tomemory transfers are required for large amounts of data which cannot be buffered in registers. In many machines, transfer cost increases with message size, and both the CM5 [10] and AP1000 [16] incorporate special mechanisms for sending small messages. Scheduling and initiation Dynamic binding using C like dispatch tables [17] costs only a few instructions more than static binding. However, the cost of frame allocation for blocking invocations is significant implying that nonblocking ....
T. Shimizu, T. Horie, and H. Ishihata, "Low-latency message communication support for the AP1000," in International Symposium on Computer Architecture, pp. 288--297, 1992.
....in a domains queue when this attribute is set, then the messages will be cleared. The requirement of setting up apriori multigroup tables is obviated, but where possible will increase efficiency. Another example of the use of domain attributes is to enforce linesending with ringbuffer receiving [6] over domains with predominantly small and quickly absorbed messages, while other domains can use the standard DMA transfer into the larger message buffers. Other uses of semantic attributes for domains can be incorporated in experimental developments. 6 Conclusion A common need in developing ....
T. Shimizu, T. Horie, H. Ishihata "Low-Latency Message Communication Support for the AP1000" in Proc. Second Fujitsu-ANU CAP Workshop, Australian National University, (Nov. 1991).
....from the past and present are shown in Figure 2 1. The round trip cost, further explained in Table 2.1, is roughly based on a two way null remote procedure call (RPC) or a ping pong operation. It is obtained by doubling the reported value when only the one way cost is provided in the literature [19, 20, 21, 15, 22, 23, 24, 25, 26, 27]. Since an actual implementation for [18] does not exist, the round trip cost is extrapolated from the specified overhead of assembling, sending and receiving a remote read message 1 . On the horizontal axis, Figure 2 1 also shows that the systems employ a variety of mechanisms for robustness. ....
....LogP analysis 116 S[20] NX library mesg exhange SP2 66.7 Mhz 96 S[20] MPI F library RS 6000 mesg exhange SHRIMP 60 Mhz Pentium 9. 5 S [25] User Level DMA w Automatic Update FLASH 100 Mhz T5 R4000 100 cyc [17] Shared Memory remote read 175 cyc [41] Active Message fetch and add AP1000 25 Mhz 65.6 S[22] Line Sending SPARC ping pong Buffering Receiving Alewife 33 Mhz SPARCLE 14.8 S[15] GID round trip null RPC Myrinet VMMC 166 Mhz Pentium 19.6 S[42] LAN based ping pong Multicomputer iWarp 20 Mhz 800 cycles [27] Message Passing using send receive FX Deposit Model Table 2.1: Round Trip ....
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Toshiyuki Shimizu, Takeshi Horie, Hiroaki Ishihata, "Low-Latency Message Communication Support for the AP1000", in ISCA 1992, pp. 288--297.
.... 816, Japan 1 Introduction In order to show the feasibility of a dataflow language, we are implementing the language on non dataflow stock machines[3] In this paper, we discuss our visualization tools for the runtime behavior of the program on a distributedmemory parallel machine, Fujitsu AP1000[4], and we discuss the performance improvement using the visualization tools. 2 Visualization In order to understand the program behavior, visualization of the program execution is very effective. As a part of our visualization tools, we used ParaGraph[2] which is a tool for visualizing ....
T. Shimizu, et al. "Low-latency message communication support for the AP1000" Proc. 19th ISCA, pp.288-297, 1992.
....single integer of two loop indices completely eliminates sending DATA to processors. To demonstrate this massively parallel approach to synchronous simulated annealing, we implement the 100 to 500 city Traveling Salesman Problem (TSP) on the 1024processor AP1000 message passing multiprocessor [5, 12]. We begin our discussion in section 2 by giving a brief description of simulated annealing and binary speculative computation. Section 3 presents a new practical method to synchronous simulated annealing for massively parallel distributed memory multiprocessors. Section 4 lists implementation ....
T. Shimizu, H. Ishihata, and T. Horie, "Low-Latency Message Communication Support for the AP1000," in Proc. ACM International Symposium on Computer Architecture, Gold Coast, Australia, May 1992, pp.288-297.
....cell activities while the T net al..lows point to point communication between cells. Each cell of the AP1000 consists of an integer unit, a floating point unit, a message controller, network interface units, 128 KB of cache, and 16 MB of memory. More details about the architecture are available in [8,15]. All the computer codes are written in C with the AP1000 message passing library. The AP1000 programming environment provides various debugging utilities including a runtime monitor, a performance analyzer, and the CASIM simulator which can run on workstations. We have found the CASIM to be ....
T. Shimizu, H. Ishihata, and T. Horie, "Low-Latency Message Communication Support for the AP1000," in Proceedings of the 19th ACM International Symposium on Computer Architecture, Gold Coast, Australia, May 1992, pp.288-297.
....using the visualization tools. 1 Introduction We are developing a non strict dataflow language and its runtime systems on several machines[3] In order to show the feasibility of the dataflow language, our implementation target machines include non dataflow stock machines such as Fujitsu AP1000 [5]. Due to the following features, we employ a fine grain multithread execution scheme in implementing our language: ffl The execution order of non strict semantics program is more flexible than the execution order of strict semantics program. ffl Our implementation employs eager evaluation, since ....
T. Shimizu, T. Horie, and H. Ishihata. "Lowlatency message communication support for the AP1000". In Proc. 19th ISCA, pp. 288-- 297, 1992.
.... and their implementations, or developed new communication subsystems [119, 120, 121] In parallel, many architectural changes in communication subsystems have been suggested, for instance, high bandwidth datapaths [122, 123] and tighter coupling of communication subsystems to microprocessors [121, 124, 125]. With increasing multimedia communications, these architectural changes demand high network performance more than ever. Together, these trends not only make flexible resource control mechanisms such as RCQ feasible in a single chip, but they also prefer simpler scheduling to more complicated ....
T. Shimizu, T. Horie, and H. Ishihata. "Low-latency message communication support for the AP1000," in Proceedings of the 19th Annual International Symposium on Computer Architecture, Gold Coast, Australia, 1992, pp. 288--297. Available from ftp:// fcapwide.fujitsu.co.jp/ap1000/english/isca/isca 92.ps.Z.
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T. Shimizu, T. Horie, and H. Ishihata : "Low-latency message communication support for the AP1000" Proc. 19th ISCA, pp.288-297, 1992.
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T. Shimizu, T. Horie, and H. Ishihata. "Low-latency Message Communication Support for the AP1000." In Proc. 19th Annual International Symposium on Computer Architecture, pages 288--297, 1992.
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