Levitan, S. (1993) VCOMP & VSIM Reference Manual, Edition 1.2.1. University of Pittsburgh  Home/Search   Document Not in Database   Summary   Related Articles

....sequential logic simulators which are instrumented for different speedup calculations, and some trace and monitoring tools for the observation of DVSIM s behavior and performance. DVSIM (Distributed VHDL SIMulator) evolved from the sequential version VSIM developed at the University of Pittsburgh [21]. VSIM and DVSIM support a substantial subset of VHDL. VSIM was chosen because of its publicly available sources and to save us the need of a completely new and time consuming development of a sequential simulator. Such a sequential simulator is necessary for the verification of the results of the ....

.... features The parallel and distributed logic simulator DVSIM consists of two main parts: a central task and one or several simulator tasks which provide the functionality of LPs (Figure 1) DVSIM uses an intermediate VHDL file (ivf ) derived from a VHDL specification by compiling it with VCOMP [21]. VCOMP can only produce flat descriptions of the specified circuits at the gate level. This is a restriction of full VHDL which allows also hierarchical simulation of designs. In the following paragraphs, we will describe how DVSIM works. Initialization. At the beginning of the simulation run, ....

Levitan, S. (1993) VCOMP & VSIM Reference Manual, Edition 1.2.1. University of Pittsburgh

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