| P. Michaud, A. Seznec, and R. Uhlig, "Trading conflict and capacity aliasing in conditional branch predictors," Proceedings of the 24th Annual ISCA, pp. 292--303, 1997 |
....considered; a longer history may lead to a larger working set of twobit counters that must be initialized when the predictor is first learning the branch. This effect has a negative impact on prediction rates, and at a certain point, longer histories begin to hurt performance for these schemes [42]. As we will see in the next section, the perceptron prediction does not have this weakness, as it always does better with a longer history length. 5.4.6 Why Does it Do Well We hypothesize that the main advantage of the perceptron predictor is its ability to make use of longer history lengths. ....
....history, leading to destructive aliasing. Our optimization re aliases pattern histories to better reflect path histories, improving accuracy by decreasing destructive aliasing. 6.1. 2 History Aliasing in a Global Predictor Several types of aliasing have been identified in branch predictors [42]. Our focus is on conflict aliasing. Consider a GAg predictor, which consists of a PHT indexed by a global history register. Two different paths in the program may coincidentally lead to the same global history, even though the code being executed is unrelated. In this case, the same PHT entry ....
[Article contains additional citation context not shown here]
P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th International Symposium on Computer Architecture, June 1997.
.... becomes a problem when the distance between correlated branches is longer than the length of a global history shift register [9] Even if a PHT scheme could somehow implement longer history lengths, it would not help because longer history lengths require longer training times for these methods [23]. Variable length path branch prediction [29] is one scheme for considering longer paths. It avoids the PHT capacity problem by computing a hash function of the addresses along the path to the branch. It uses a complex multi pass profiling and compiler feedback mechanism that is impractical for a ....
....considered; a longer history may lead to a larger working set of two bit counters that must be initialized when the predictor is first learning the branch. This effect has a negative impact on prediction rates, and at a certain point, longer histories begin to hurt performance for these schemes [23]. As we will see in the next section, the perceptron prediction does not have this weakness, as it always does better with a longer history length. 16 252.eon 253.perlbmk 254.gap 255.vortex 256.bzip2 300.twolf Harmonic 1 2 Instructions per Alpha like 3 cycle overriding predictor ....
P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th International Symposium on Computer Architecture, June 1997.
....methodology, discuss the accuracies of each predictor, and present performance results measured with instructions per cycle (IPC) 4.1 Experimental Methodology 4.1. 1 Predictors Simulated We use the perceptron predictor [8] multi component hybrid predictor [5] and the 2Bc gskew predictor [11]. The perceptron predictor and multi component hybrid predictor are the most accurate known branch predictors in the academic literature. The recently presented EV8 branch predictor is a practical implementation of 2Bc gskew [14] For each predictor, we use the overriding mechanism to mitigate ....
P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th International Symposium on Computer Architecture, pages 292--303, June 1997.
....as an explicit data dependence. Most current dynamic branch predictors use some combination of the branch address, path information [24] and the local global history [26, 36] of branch outcomes to make the prediction. Despite many attempts to improve predictor mechanisms and eliminate aliasing [9, 21, 23, 25, 31], only small incremental improvements have been realized with these approaches. There is still a large number of dynamic branches that are mispredicted, e.g. for go. Current branch predictor designs appear to be reaching the limit relative to the type of input information provided [8] Related ....
P. Michaud, A. Seznec, and R. Uhlig. Trading Conflict and Capacity Aliasing in Conditional Branch Predictors. 24th International Symposium on Computer Architecture, pages 292--303, June 1997.
....dependent on being able to accurately predict the control (branch) flow in the program, so that we can execute more useful instructions and avoid stalling squashing the pipeline. Branch predictors for control flow prediction have been studied extensively with different programs [29] 31] 23][15] and also with OS effects [8] The OS affects control flow predictability by introducing the additional user OS branch aliasing in branch predictor tables. The negative impact of kernel branches on branch prediction has been reported in [8] We also find that kernel code nearly doubles the ....
....paper. While eliminating all branch prediction aliasing is not trivial, it is our belief that the destructive user OS part can be alleviated with appropriate architectural support. There are numerous branch predictors that have been proposed to address different situations [30] 14] 7] 25] 10] 4][15][6] These prediction mechanisms have paid less attention to the OS requirements and no particular scheme was proposed on tuning control flow prediction hardware for the OS. Our intention in this paper, however, is not to propose a new predictor to add to this list. Rather, it is to understand the ....
P. Michaud, A. Seznec and R. Uhlig, Trading Conflict and Capacity Aliasing in Conditional Branch Predictors, In Proceedings of the 24th International Symposium on Computer Architecture, pages 292-303, 1997.
....mispredictions) which arise when unrelated branches happen to collide in a particular branch predictor entry and overwrite each other s state. A wealth of effective techniques have been developed to reduce conflict occurrence in the pattern history table (PHT) of two level predictors [5] [25], 27] 36] Even without using aggressive anti aliasing techniques, conflicts account for only 15 20 of mispredictions in global history predictors and 40 50 in local history predictors. Work on hybrid predictors with global and local history based components [3] 9] implicitly ....
....and in addition found that XORing history bits and address bits, as in gshare [24] provides little benefit. Other researchers have described a variety of more aggressive techniques for reducing conflict mispredictions. Sprangle et al. described an agree predictor in [36] Michaud et al. [25] introduced a skewed predictor, in which the branches simultaneously exist in multiple PHTs, and each PHT is indexed using a different hash function. A voting function combines the multiple PHT results to generate a prediction. Lee et al. 23] and Eden and Mudge [5] observed that conflicting ....
P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th Annual International Symposium on Computer Architecture, pages 292--303, June 1997.
....is critically dependent on being able to accurately predict the control (branch) flow in the program, so that we can execute more useful instructions and avoid stalling squashing the pipeline. Branch predictors for control flow prediction have been studied extensively with different programs [Yeh91, Young95, Sech96 and Mich97] and also with OS effects [Gloy96] The OS affects control flow predictability by introducing the additional user OS branch aliasing in branch predictor tables. The negative impact of kernel branches on branch prediction has been reported in [Gloy96] We also find that user OS execution can ....
P. Michaud, A. Seznec and R. Uhlig, Trading Conflict and Capacity Aliasing in Conditional Branch Predictors, In Proceedings of the 24th International Symposium on Computer Architecture, pages 292 - 303, 1997
....pattern history, leading to destntctive aliasing. Our opti mization re aliases pattem histories to better reflect path histories, improving accuracy by decreasing destructive aliasing. 4. 2 History Aliasing in a Global Predictor Several types of aliasing have been identified in branch predictors [19]. Our focus is on conflict aliasing. Consider a GAg predictor, which consists of a PHT indexed by a global history register. Two different paths in the program may coincidentally lead to the same global history, even though the code being executed is unrelated. In this case, the same PHT entry ....
....is to reduce de I I [ Constructive Aliasing stmctive aliasing in the PHT for a GAg predictor. In omc experiments, we model a de aliased predictor, i.e. a predictor where different paths cannot alias the same 20 PHT entries. We use this predictor to measure three kinds of aliasing [19]: Destructive aliasing occurs when PHT aliasing leads to a misprediction in GAg where the de I aliased predictor has no misprediction. leads to a correct prediction where the de aliased predictor mispredicts. Harmless aliasing occurs when aliasing in the PHT has no effect on whether or ....
P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th International Symposium on Computer Architecture, June 1997.
....considered; a longer history may lead to a larger working set of twobit counters that must be initialized when the predictor is first learning the branch. This effect has a negative impact on prediction rates, and at a certain point, longer histories begin to hurt performance for these schemes [42]. As we will see in the next section, the perceptron prediction does not have this weakness, as it always does better with a longer history length. 5.4.6 Why Does it Do Well We hypothesize that the main advantage of the perceptron predictor is its ability to make use of longer history lengths. ....
....history, leading to destructive aliasing. Our optimization re aliases pattern histories to better reflect path histories, improving accuracy by decreasing destructive aliasing. 6.1. 2 History Aliasing in a Global Predictor Several types of aliasing have been identified in branch predictors [42]. Our focus is on conflict aliasing. Consider a GAg predictor, which consists of a PHT indexed by a global history register. Two different paths in the program may coincidentally lead to the same global history, even though the code being executed is unrelated. In this case, the same PHT entry ....
[Article contains additional citation context not shown here]
P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th International Symposium on Computer Architecture, June 1997.
.... becomes a problem when the distance between correlated branches is longer than the length of a global history shift register [9] Even if a PHT scheme could somehow implement longer history lengths, it would not help because longer history lengths require longer training times for these methods [23]. Variable length path branch prediction [29] is one scheme for considering longer paths. It avoids the PHT capacity problem by computing a hash function of the addresses along the path to the branch. It uses a complex multi pass profiling and compiler feedback mechanism that is impractical for a ....
....considered; a longer history may lead to a larger working set of two bit counters that must be initialized when the predictor is first learning the branch. This effect has a negative impact on prediction rates, and at a certain point, longer histories begin to hurt performance for these schemes [23]. As we will see in the next section, the perceptron prediction does not have this weakness, as it always does better with a longer history length. 16 253.perlbmk 254.gap 255.vortex 256.bzip2 300.twolf Harmonic 1 2 Instructions per Alpha like 3 cycle overriding predictor Perceptron ....
P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th International Symposium on Computer Architecture, June 1997.
.... This is a problem when the distance between correlated branches is longer than the length of a pattern history shift register [17] Even if a PHT scheme could somehow implement longer history lengths, it may not help because longer history lengths require longer training times for these methods [18]. One scheme has been proposed 1 2 4 8 16 32 64 128 256 512 Hardware Budget, Kilobytes 0 2 4 6 8 10 Percent Mispredicted Perceptron vs. other techniques, 126.gcc Gshare Perceptron 1 2 4 8 16 32 64 128 256 512 Hardware Budget, Kilobytes 0 2 4 6 8 10 Percent Mispredicted ....
P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th International Symposium on Computer Architecture, June 1997.
....and suggest improvements may be realized by supplying additional knowledge of the executing program to the predictor, varying the history length, and by using n bit counters. The YAGS predictor paper [5] nicely summarizes a variety of predictors (gshare [17] Agree [19] Bi Mode [14] Skew [18], and Filter [2] that use varying methods to eliminate interference in pattern history tables. In their paper [5] they address the deficiencies of these predictors and introduce their own predictor, called YAGS (Yet Another Global Scheme) Their focus on interference in 2 level adaptive ....
P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th Annual Intl. Symposium on Computer Architecture, May 1997.
....history, leading to destructive aliasing. Our opti mization re aliases pattern histories to better reflect path histories, improving accuracy by decreasing destructive aliasing. 4. 2 History Aliasing in a Global Predictor Several types of aliasing have been identified in branch predictors [19]. Our focus is on conflict aliasing. Consider a GAg predictor, which consists of a PHT indexed by a global history register. Two different paths in the program may coincidentally lead to the same global history, even though the code being executed is unrelated. In this case, the same PHT entry ....
....Rates The purpose of branch path re aliasing is to reduce destructive aliasing in the PHT for a GAg predictor. In our experiments, we model a de aliased predictor, i.e. a predictor where different paths cannot alias the same PHT entries. We use this predictor to measure three kinds of aliasing [19]: Destructive aliasing occurs when PHT aliasing leads to a misprediction in GAg where the dealiased predictor has no misprediction. Constructive aliasing occurs when PHT aliasing leads to a correct prediction where the de aliased predictor mispredicts. Harmless aliasing occurs when ....
P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th International Symposium on Computer Architecture, June 1997.
....[28, 24] in which multiple branch information vectors share the same entry in the predictor table, causing the predictions for two or more branch substreams to intermingle. De aliased global history branch predictors have been recently introduced: the enhanced skewed branch predictor e gskew [15], the agree predictor [22] the bimode predictor [13] and the YAGS predictor [4] These predictors have been shown to achieve higher prediction accuracy at equivalent hardware complexity than larger aliased global history branch predictors such as gshare [14] or GAs [27] However, hybrid ....
....These degrees of freedom were leveraged to design the best possible branch predictor fitting in the EV8 hardware budget constraints. 4. 1 General structure of the hybrid skewed predictor 2Bc gskew The enhanced skewed branch predictor e gskew is a very efficient single component branch predictor [15, 13] and therefore a natural candidate as a component for a hybrid predictor. The hybrid predictor 2Bc gskew illustrated in Fig. 2 combines e gskew and a bimodal predictor. 2Bc gskew consists of four 2 bit counters banks. Bank BIM is the bimodal predictor, but is also part of the e gskew predictor. ....
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P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th Annual International Symposium on Computer Architecture (ISCA-97), June 1997.
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P. Michaud, A. Seznec, and R. Uhlig, "Trading conflict and capacity aliasing in conditional branch predictors," Proceedings of the 24th Annual ISCA, pp. 292--303, 1997
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MICHAUD, P., SEZNEC, A., AND UHLIG, R. 1997. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th International Symposium on Computer Architecture, 292--303.
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P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th International Symposium on Computer Architecture, pages 292--303, June 1997.
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P. Michaud, A. Seznec and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. 24th Intl. Symp. on Computer Architecture, 1997.
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P. Michaud, A. Seznec, and R. Uhlig, "Trading conflict and capacity aliasing in conditional branch predictors," Proceedings of the 24th Annual ISCA, pp. 292--303, 1997
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Pierre Michaud, Andr'e Seznec, and Richard Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. Proceedings of the 24th Annual Intl. Symposium on Computer Architecture, pages 292--303, 1997.
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P. Michaud, A. Seznec, and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. In Proceedings of the 24th Annual Intl. Symposium on Computer Architecture, pages 292--303, June 1997.
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Pierre Michaud, Andr'e Seznec, and Richard Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. Proceedings of the 24th Annual Intl. Symposium on Computer Architecture, pages 292-- 303, 1997.
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P. Michaud, A. Seznec and R. Uhlig. Trading conflict and capacity aliasing in conditional branch predictors. Proceedings of the 24th International Symposium on Computer Architecture, pp. 292--303, 1997.
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P. Michaud, A. Seznec, and R. Uhlig, "Trading conflict and capacity aliasing in conditional branch predictors," in Computer Architecture, pp. 292--303, 1997
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P. Michaud, A. Seznec, and R. Uhlig, "Trading Conflict and Capacity Aliasing in Conditional Branch Predictors," in Proceedings of the 24th International Symposium on Computer Architecture, (Boulder, CO, USA), pp. 292--303, June 1997.
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