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M. Abramovici, M. Breuer, and A. Friedman. Digital Systems Testing and Testable Design. New York: Computer Science Press, 1990

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Dynamic Power Minimization During Combinational Circuit.. - Artem Sokolov Alodeep   (Correct)

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M. Abramovici, M. Breuer, and A. Friedman. Digital Systems Testing and Testable Design. New York: Computer Science Press, 1990


Hidden Markov and Independence Models with Patterns for.. - Laurent Brehelin Olivier   (Correct)

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M. Abramovici, M. Breuer, and A. Friedman. Digital Systems Testing and Testable Design. 1990.


High-Level Test Generation and Built-In . . . - Jervan (2002)   (Correct)

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M. Abramovici, M. A. Breuer, A. D. Friedman, "Digital Systems Testing and Testable Design," IEEE Press, 1990.


A Hamming Distance Based Test Pattern Generator with.. - Dhiraj Pradhan Dimitri (2005)   (Correct)

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M. Abramovici, M. A. Breuer, A. D. Friedman, Digital Systems Testing and Testable Design, Computer Science Press, New York, 1990.


Unknown - Proc Rd International   (Correct)

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M. Abramovici, M.A. Breuer, A.D. Friedman, Digital Systems Testing and Testable Design,N ewYork,IEEEPress , 1999. TABLE 1 COMPARISON OF COLLAPSED AND SSBDD FAULTS Circuit Uncollapsed Collapsed SSBDD c880 1550 942 994 c1355 2194 1574 1618


Independent Test Sequence Compaction through Integer.. - Petros Drineas Computer   (Correct)

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M. Abramovici, M. A. Breuer, and A. D. Friedman, Digital Systems Testing and Testable Design, IEEE Press, 1990.


Functional Scan Chain Testing - Douglas Chang Mike (1998)   (1 citation)  (Correct)

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M.Abramovici,M.A.Breuer,andA.D.Friedman. Digital Systems Testing and Testable Design.CS Press, New York, 1990.


SSBDDs: Advantageous Model and Efficient Algorithms - For Digital Circuits   (Correct)

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M. Abramovici, M.A. Breuer, A.D. Friedman, Digital Systems Testing and Testable Design, New York, IEEE Press, 1999.


Accelerating the Compaction of Test Sequences in.. - Dimopoulos, Linardis (2003)   (Correct)

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M. Abramovici, M. Breuer, and A. Friedman, Digital Systems Testing and Testable Design. New York: IEEE Press, 1990.


Application of Fuzzy Logic in Resistive Fault Modeling.. - Nourani, Attarha, Lucas (2002)   (Correct)

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M. Abramovici, M. Breuer, and A. Friedman, Digital Systems Testing and Testable Design. New York: IEEE Press, 1990.


ATPG and DFT Algorithms for Delay Fault Testing - Liu (2004)   (Correct)

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M. ABRAMOVICI, M. A. BREUER, and A. D. FRIEDMAN. Digital Systems Testing and Testable Design. Computer Science Express, 1990.


Embedded Test for Processor and Memory Cores in.. - Tehranipour..   (Correct)

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Abramovici, M. Digital System Testing and Testable Design, New York, Computer Science Press, (1990). Lists of captions figures and tables


A Computer-Aided Design Methodology for Low Power Sequential.. - Monteiro (1996)   (Correct)

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M. Abramovici, M. Breuer, and A. Friedman. Digital Systems Testing and Testable Design. Computer Science Press, 1990.


Unknown -   (Correct)

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M. Abramovici, M. A. Breuer and A. D. Friedman, Digital Systems Testing and Testable Design, Computer Science Press, 1990.


Strunz R, Toal D, McGowan C. - Software Hardware Digital   (Correct)

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Abramovici.M et al, Digital System Testing And Testable Design, AT&T Bell Laboratories & Freeman + Company, USA, 1990. ISBN 0-7167-8179-4.


A Symbolic Inject-and-Evaluate Paradigm for Byzantine Fault.. - Huang   (Correct)

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M. Abramovici, M. A. Breuer, and A. D. Friedman, Digital System Testing and Testable Design, Computer Science Press. (1990).


Approximating Minimum Feedback Sets and Multicuts in.. - Even, Naor, Schieber.. (1998)   (37 citations)  (Correct)

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M. Abramovici, M.A. Breuer, and A.D. Friedman, Digital Systems Testing and Testable Design, Computer Science Press, New York, 1990.


Comprehensive Fault Diagnosis of Combinatorial Circuits - Lavo (2002)   (Correct)

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M. Abramovici, M. Breuer, and A. Friedman. Digital Systems Testing and Testable Design. W.H. Freeman and Company, New York, NY. 1990.


Unknown - Background We Measured   (Correct)

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M. Abramovici, M.A. Breuer and A.D. Friedman, Digital Systems Testing and Testable Design, IEEE, Jan. 1998.


A Practical Tutorial on Modified Condition/Decision Coverage - Hayhurst, al. (2001)   (1 citation)  (Correct)

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Abramovici, Miron; Breuer, Melvin A.; and Friedman, Arthur D.: Digital Systems Testing and Testable Design. Computer Science Press, 1990.


Allocation for Testability in High-Level Synthesis - Bukovjan (2000)   (Correct)

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M. Abramovici, M.A. Breuer, and A.D. Friedman. Digital System Testing and Testable Design, Revised Printing. IEEE Press, NJ, USA, 1995. ISBN 0-7803-1062-4.


Allocation for Testability in High-Level Synthesis - Bukovjan (2000)   (Correct)

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M. Abramovici, M.A. Breuer, and A.D. Friedman. Digital System Testing and Testable Design. Computer Science Press, New York, 1990. ISBN 07167 -8179-4.


High-Level Area and Power-up Current Estimation.. - Li, He, Basile..   (Correct)

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M. Abramovici, M. A. Breuer, and A. D. Friedman, Digital Systems Testing and Testable Design. IEEE PRESS, 1990.


Chip-Level Diagnostic Strategy For Full-Scan Designs With.. - Yu-Chiun Lin Shi-Yu   (Correct)

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M. Abramovici, M. A. Breuer, and A. D. Friedman, "Digital System Testing and Testable Design," Computer Science Press. (1990).


On the Characterization of Hard-to-Detect Bridging Faults - Pomeranz, Reddy, Kundu (2003)   (Correct)

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M. Abramovici, M. A. Breuer and A. D. Friedman, Digital Systems Testing and Testable Design, Computer Science Press, 1990.

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