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P. McGeer, K. McMillan, A. Saldanha, A. SangiovanniVincentelli, and P. Scaglia, "Fast Discrete Function Evaluation," in Proc. Intl. Conf. on Computer-Aided Design, Nov. 1995.

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Hybrid Techniques for Fast Functional Simulation - Luo, Wongsonegoro, Aziz (1998)   (7 citations)  (Correct)

....idea as a proof of concept functional simulator in the Berkeley VIS package [3] this is invoked by the hsim (hybrid simulation) command. The performance of our simulator is compared with a pure BDDbased cycle simulator, which is implemented based on the work of Ashar et al. [1] and McGeer et al. [8]. This simulator is available as the new sim command in the latest VIS release. Experimental results show the superiority of our simulator; both simulation time and model building time are greatly reduced. 2 BDD based Functional Simulation Traditional functional simulators usually use levelized ....

....simulation. 6] proposed the use of branching programs for switch level functional simulation. Recent research shows that functional simulation with branching programs or decision diagrams on partitioned circuits can speedup the logic level functional simulation by an order of magnitude [1, 8]. BDD based functional simulation of single output circuits is straightforward. BDD representation for the function of the primary output is built in terms of all primary inputs in its support. Evaluation of the function is done by evaluating the BDD [4] which has a time complexity of O(n) n ....

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P. McGeer, K. McMillan, A. Saldanha, A. SangiovanniVincentelli, and P. Scaglia. Fast Discrete Function Evaluation. Proc. Intl. Conf. on Computer-Aided Design, pages 402--407, 1995.


Efficient Coverage Directed State Space Search - Malay Ganai (1998)   (1 citation)  (Correct)

....model checking makes it very unstable; in some sense, our approach attempts to best utilize the physical memory available on the machine. In this regard, we were inspired by the dramatic improvements made to cycle simulation by the use of BDD decomposition by Ashar and Malik [1] and McGeer et al. [13], to consider the problem of how best to use available memory for symbolic verification. Another work we have built on is that of Ravi et al. 16] Their approach attempts to pick high density subsets of the state sets encountered during reachability analysis. IWLS 1998 Submission 4 These sets ....

P. McGeer, K. McMillan, A. Saldanha, A. Sangiovanni-Vincentelli, and P. Scaglia. Fast Discrete Function Evaluation. In Proc. Intl. Conf. on Computer-Aided Design, November 1995.


On Combining Formal and Informal Verification - Yuan, Shen, Abraham, Aziz (1997)   (13 citations)  (Correct)

....novel to this paper. We have been influenced by a number of related works. Thompson s [15] work on Retrograde Analysis provided the initial impetus. Additionally, we were influenced by the dramatic improvements made to cycle simulation by the use of BDDs by Ashar and Malik [1] and McGeer et al. [9], who made clear the importance of making maximum use of the physical memory available on the machine. Ravi et al. 13] attempt to pick subsets of state sets encountered during reachability analysis which have small BDDs but contain a large number of states. This is distinct from our approach, ....

....control states are visited; we ascribe this to the fact that the control state saturated simulation is faster, and so manages to go deeper into the state space in the same amount of time; this is seen in the depth column. We compare saturated simulation with fast lookup based cycle simulation [1, 9] in Table 4. For viper, we performed 1000 sets of simulations, each comprising Example j Rchd. States j Peak BDD jControl Statesj jControl Edgesj depth viper 1:36 Theta 10 19 2033 23 31 4 8085 1:43 Theta 10 7 275641 1233 3723 10 Table 1. Complete BDD based reachability analysis. Example ....

P. McGeer, K. McMillan, A. Saldanha, A. Sangiovanni-Vincentelli, and P. Scaglia. Fast Discrete Function Evaluation. In Proc. Intl. Conf. on Computer-Aided Design, November 1995.


Formal Methods in VLSI System Design - Aziz (1996)   (1 citation)  (Correct)

....200 300 400 500 600 100 700 usage Time (sec) clusters Number of Peak memory Cluster size BDD nodes Cluster size BDD nodes Cluster size BDD nodes Figure 4. 5: Time Space tradeoffs in image computation spin offs from BDD based ideas that are proving useful in synthesis and simulation, e.g. [77]. Progress on BDD technology and BDD techniques is being made on a regular basis [94] BDD based approaches to verification do have major shortcomings. For example, there is some evidence that for loosely coupled asynchronous systems, such as cache coherency protocols, careful use of explicit data ....

P. McGeer, K. McMillan, A. Saldanha, A. Sangiovanni-Vincentelli, and P. Scaglia. Fast Discrete Function Evaluation. In Proc. of the MCNC Intl. Workshop on Logic Synthesis, volume 1, May 1995.


Hybrid Verification Using Saturated Simulation - Aziz, Kukula, Shiple   (Correct)

....algorithms, since no description of the underlying procedures is given. Other less closely related works include those of Ashar x1 w1 L2 w2 0 1,1 1 0 1,1 1 10 00 01 11 L1 0 0 1 0 0 0,1 0 (b) Finite State Machine (a) Netlist Figure 1: Examples: Netlist and FSM and Malik [2] and McGeer et al. [12], who stress the importance of managing BDD size explosion, and the research of Ho et al. 8] and Hoskote et al. 9] who create test vectors using ideas from FV. Note that our approach is liberal , i.e. does note guarantee that all bugs are found; conservative approaches include that of Cho ....

P. McGeer, K. McMillan, A. Saldanha, A. Sangiovanni-Vincentelli, and P. Scaglia. Fast Discrete Function Evaluation. In Proc. Intl. Conf. on ComputerAided Design, November 1995.


Heuristic Symmetry Reduction for Invariant Verification - William Hung Adnan   Self-citation (Mcmillan)   (Correct)

No context found.

P. McGeer, K. McMillan, A. Saldanha, A. SangiovanniVincentelli, and P. Scaglia, "Fast Discrete Function Evaluation," in Proc. Intl. Conf. on Computer-Aided Design, Nov. 1995.


Heuristic Symmetry Reduction for Invariant Verification - William Hung   Self-citation (Mcmillan)   (Correct)

....Note that we do not pack states into bit arrays [3] Instead, we pack multi valued states into byte arrays. So there is substantial scope for reducing memory usage in the explicit column. Instead of using compiled code execution model, we use fast cycle simulation techniques based on [12] and [13]. Additionally, we report the largest memory used by BDD for state sets encountered during reachability. 7 Summary To summarize, we have made theoretical and practical contributions towards the use of symmetry in invariant verification. We developed a theory for exploiting symmetry for designs ....

P. McGeer, K. McMillan, A. Saldanha, A. SangiovanniVincentelli, and P. Scaglia, "Fast Discrete Function Evaluation," in Proc. Intl. Conf. on Computer-Aided Design, Nov. 1995.

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