P. Christy. Software to support massively parallel computing on the MasPar MP-1. In Proceedings of the  Home/Search   Document Not in Database   Summary   Related Articles   Check

....of parallelism than the vector parallelism associated with traditional vector supercomputers. We denote this parallelism Superword Level Parallelism since parallelism comes in the form of superwords containing packed data. Note that SLP also differs from traditional large scale SIMD parallelism [6, 8, 28]. SIMD supercomputers require large amounts of parallelism in order to achieve speedups, whereas SLP can be profitable when such parallelism is scarce. In some sense, superword level parallelism is actually a restricted type of ILP. ILP techniques have been very successful in the general purpose ....

....good MIMD performance, extracting a small amount of SLP would not detract from existing MIMD parallel performance. 2.2. 3 SIMD Parallelism SIMD parallelism came into prominence with the advent of massively parallel supercomputers such as the Thinking Machines CM1 and CM 2 [28, 29] and Maspar MP 1 [6, 8]. The association of the term SIMD with these types of computers is what led us to utilize the term Superword Level Parallelism when discussing short SIMD parallelism. These supercomputers were implemented using thousands of small processors which worked synchronously on a single instruction ....

P. Christy. Software to support massively parallel computing on the MasPar MP-1. In Proceedings of the

....extracting SLP should not detract from existing MIMD parallel performance. 2. 4 SIMD Parallelism SIMD parallelism came into prominence with the advent of massively parallel supercomputers such as the Illiac IV [11] and later with the Thinking Machines CM 1 and CM 2 [25, 26] and the Maspar MP 1 [4, 6]. The association of the term SIMD with this type of computer is what led us to use Superword Level Parallelism when discussing short SIMD operations. SIMD supercomputers were implemented using thousands of small processors that 14 worked synchronously on a single instruction stream. While ....

P. Christy. Software to Support Massively Parallel Computing on the MasPar MP-1. In Proceedings of the

....over POMPC. Most of the SIMD machines provide this kind of basic language and a taxonomy of many SIMD languages and machines can be found in [Tuc90] POMPC has been inspired by the previous version of C [Thi87, pages 35 41] and is rather similar to the new version of this language. MPL [Chr90] and MultiC [Wav90] are also alike (without the collection mechanism) To implement this model, we must define at any time what the different processors (the scalar one and the different virtual SIMD machines) are doing. As only the scalar processor has the control over the program flow and as ....

Peter Christy. Software to support massively parallel computing on the maspar mp-1. In IEEE, editor, IEEE Compcon Spring 1990, February 1990.

....d evelopp e pour la machine Warp [4] De plus W2 requiert la connaissance des d etails de l architecture, comme le nom des liens de communication. 2 Fr ed eric Raimbault, Patrice Quinton, Dominique Lavenier Une troisi eme voie repose sur l utilisation de langages a parall elisme de donn ees [26, 32, 7, 31]. Ils offrent l avantage d etre fond es sur un mod ele de programmation synchrone et de voir les echanges entre processeurs d une facon globale, comme des op erations sur des collections de donn ees. Les langages a parall elisme les plus connus sont toutefois tr es li es au mod ele ....

P. Christy. Software to Support Massively Parallel Computing on the Maspar MP-1. In IEEE, editor, COMPCON, feb 1990.

.... multiprocessors will have distributed memory [142] This is the case whether they provide virtual (non uniform) shared memory in hardware (e.g. KSR1 [201] Dash [161] or rely on the programmer to write message passing programs (e.g. on CM 5 [76] or data parallel programs (e.g. on MasPar MP 1 [70]) This recognition of distributed memory is also found in theoretical research. There are efforts to extend the restrictive PRAM model and come up with more realistic models of parallel computation that take various practical parameters (e.g. communication latency) into account. Because of this ....

Peter Christy. Software to Support Massively Parallel Computing on the MasPar MP-1. In IEEE COMPCON Proceedings, pages 29--33, 1990.

....explain why some sequences of instructions are performed better in one mode than in the other and are the primary basis employed in comparing different mappings of a parallel algorithm onto a mixed mode system. Experiments are performed using the MIMD Intel Paragon [AlG94] SIMD MasPar MP 1 [Bla90, Chr90, Nic90], and the mixed mode PASM prototype [SiS96] The potential advantage of machine partitioning for concurrent subtask execution is theoretically analyzed in Chapter 6. Experiments performed on the three machines are also presented in Chapter 6. An important area of research in parallel computers is ....

....This method places the processors on one side of an interconnection network #################### and the memories on the other side. In this way, a processor can access any number of memory modules. In practice most parallel machines are designed with PE to PE organizations (e.g. MasPar MP 1 [Bla90, Chr90, Nic90], Intel Paragon [AlG94] and nCUBE 2 [HaM89] The application studies in the following chapters targeted parallel systems with a PE to PE configuration. A parallel system is said to be partitionable ########### if it can be divided into independent communicating submachines ########### , i.e. ....

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P. Christy, "Software to support massively parallel computing on the MasPar MP-1," IEEE Compcon, February 1990, pp. 29-33.

....for a SIMD compiler is to achieve a balance in the CU PE computational load [25] Thus, the potential advantages of CU PE overlap must be considered when comparing the SIMD, MIMD, and mixed mode parallelism. 6. MasPar MP 1 Implementations The Purdue MasPar MP 1 is an SIMD machine with 16,384 PEs [3, 4, 21]. Each PE s arithmetic and logic unit (ALU) is 4 bits wide. There are two bit serial networks in the MP 1: the X Net is a 128 by 128 mesh that connects a PE to each of its eight nearest neighbors, and the multistage router provides a way to connect a PE to any other PE in three router stages (with ....

P. Christy. Software to support massively parallel computing on the MasPar MP-1. IEEE Compcon 1990, pp. 29-33. IEEE Computer Society Press. 1990.

....language for STARAN [43] The second approach is to design a dialect of a common standard programming language such as C, Pascal or Fortran. This is a popular approach in most very high performance SIMD machines. Examples of such languages include the MasPar Fortran (MPF) and MasPar C (MPC) [44], the Connection Machine C TM language [33] and the Terasys PIM data parallel bit C (dbc) 13] The third approach is to use C as the programming language for the SIMD machine, with the addition of specialized libraries [4] 14] The C programming language [45] allows creation of new ....

Peter Christy, "Software to Support Massively Parallel Computing on the MasPar MP-1", Proceedings of the IEEE COMPCON Spring, pp 29-33, February, 1990.

....onto the processor array is unsuitable for our application. We have therefore written our programs in MPL, MasPar s C like language with extension for programming the communication. The MPL language also supports a built in reduction function for computing the minimum value in constant time [Chr90] As documented in [Pre93] the cost of this operation is independent of the number of participating processors and is, on the MP 2, about 12 times the cost of multiplying two integers. A crucial detail for good performance on the MasPar computers is keeping the most used variables in registers ....

Peter Christy. Software to support massively parallel computing on the maspar mp-1. In Proceedings of IEEE Compcon Spring 1990. IEEE, February 1990.

....operations such as element wise add, multiply and compare, we also need to do global operations, also known as reductions, to find the maximum or minimum element of a vector. Communication between processors only occur in form of reductions, which can be performed in constant time; see e.g. [13], 27] No other exchange of data between processors is necessary in our algorithm. In summary, all parallel operations needed in our algorithm can be performed in constant time. 2.2. Parallelization of augmenting path search The key element in any algorithm for the MTOAP (or LAP) which is based ....

....a reduction, is used. A reduction is used to get a global result, a scalar, from a vector or a matrix for instance the maximum, minimum or the sum of all elements. Special hardware and software support is available on both machines for efficient execution of reductions. It is well documented [13], 27] that the MP 2 computes minimum or maximum reductions in constant time. Also the CM supports this operation in O(1) time as pointed out by an anonymous referee. On the CM, the CM Fortran [32] programming language permits usage of a special slicewise mode of operation. It implies that the ....

P. Christy. Software to support massively parallel computing on the MasPar MP-1. In Proceedings of IEEE Compcon Spring 1990. IEEE, February 1990.

....Abstract Machine, the i th vector register above rf is designated as pi. One of the vector registers is reserved as the system wide status word and p0 of each procedure is used as 32 single bit registers. In order to support register windows, we do not use the MasPar Application Language (MPL) Chr90] to implement our runtime libraries but assembly language is used instead. 5.3 Process Management A process structure resides on ACU. It consists of the following fields. ffl process id ffl continuation pointer ffl number of arguments ffl pointer to the argument vectors on the argument ....

P. Christy. Software to support massively parallel computing on the Maspar MP-1. In Proceedings of the IEEE COMPCON Spring 1990, pages 29--33, San Francisco, February 1990. IEEE.

....or 290 Mflops for a machine having 8192 processors. On the MasPar MP 1, a floating point multiplication takes approximately three times the time for a corresponding floating point addition, in 64 bit precision. A more detailed general description of the MasPar MP 1 computer can be found in [1, 2, 8]. 6 Results We have carefully timed the implementation. All MasPar times are wall clock elapsed times. The SLALOM benchmark supports a set of input data. We refer to this as (the) Standard (case) in Table 1 and Table 2. For our iterative solver, we have tried to find a difficult case, that is a ....

P. Christy, Software to support massively parallel computing on the MasPar MP-1, in Proceedings of IEEE Compcon Spring 1990, IEEE, February 1990.

....over POMPC. Most of the SIMD machines provide this kind of basic language and a taxonomy of many SIMD languages and machines can be found in [Tuc90] POMPC has been inspired by the previous version of C [Thi87, pages 35 41] and is rather similar to the new version of this language. MPL [Chr90] and MultiC [Wav90] are also alike (without the collection mechanism) To implement this model, we must define at any time what the different processors (the scalar one and the different virtual SIMD machines) are doing. As only the scalar processor has the control over the program flow and as ....

Peter Christy. Software to support massively parallel computing on the maspar mp-1. In IEEE, editor, IEEE Compcon Spring 1990, February 1990.

.... which is local to a set of PEs, or to a PE located in a straight line (Figure 4) while the global router is mainly used for transmitting data between PEs which are not logically arranged closely together (Figure 3) The programming language for the MP 1 is a parallel variation of C known as MPL [21]. There is a very e#cient library of routines for most of the parallel techniques, including scan, which executes the parallel prefix and segmented parallel prefix computations, and reduce which executes a recursive doubling scheme for any of the associative operators. Since the MP 1 is a SIMD ....

P. Christy, "Software to support massively parallel computing on the MasPar MP-1," Proceedings of the Thirty-fifth IEEE Computer Society International Conference, February 26--March 2 1990, San Francisco, California, pp. 29--33.

....link names. The third possibility for systolic programming is based on the data parallelism [13] The advantage of this approach lies in its synchronous programming model and its global view of data exchanges as operations acting on data collections. However, well known data parallel languages [7, 24, 29, 25] are highly dependent on the SIMD architectural model. They assume that a particular set of features is available, such as routing, virtual processor support, activity mask, reduction and scan operations [31] On the other hand they do not resolve the problem of I O, which is fundamental in ....

P. Christy. Software to Support Massively Parallel Computing on the Maspar MP-1. In IEEE, editor, COMPCON, feb 1990.

....by 2 complement numbers over 8 or 16 bits, and the states of the neurons are coded over 1 to 8 bits. Duranton and Sirat [7, 8] have described implementations of both SOM, Hopfield and BP networks on this architecture. However, no figures of performance were given. 5. 4 MasPar MasPar MP 1 [1, 5, 42] is a SIMD machine with both mesh and global interconnection style of communication. It has floating point support, both VAX and IEEE standards. The number of processing elements can vary between 1024 and 16384. Each PE has 40 32 bit registers, a 4 bit integer ALU, floating point units for ....

Christy, P. "Software to support massively parallel computing on the MasPar MP-1." In Proceedings of COMPCON Spring 90, pp. 29-33, San Fransisco, CA, 1990.

....being a 32 bit integer addition. Floating point performance is 1500 MFLOPS single precision (32 bit) and 650 MFLOPS double precision (64 bit) 20] Figure 2 shows the system block diagram of the MasPar [21] The programming language for the MP 1 is a parallel variation of C known as MPL [22]. Physically, the unit is divided into two devices, a front end, represented by the UNIX subsystem and X Window console (Figure 2) and the data parallel unit (DPU) which is everything else in Figure 2 [21] The DPU consists of an array control unit (ACU) an array of at least 1024 (16,384 ....

P. Christy, "Software to support massively parallel computing on the MasPar MP1, " Proceedings of the Thirty-fifth IEEE Computer Society International Conference, February 26--March 2 1990, San Francisco, California, pp. 29--33.

....of an average floating point operation. On the MasPar MP 1, fl 0:2 and a floating point multiplication takes approximately three times the time for a corresponding floating point addition, all in 64 bit precision. A more detailed general description of the MasPar MP 1 computer can be found in [4, 9, 22]. 3 Multiplying N ThetaN matrices on an N ThetaN Processor array To emphasis the algorithmic structure, we first describe the basic algorithms for the special case of square N Theta N matrices that fit exactly on a N 2 processor machine. We assume (as is the case on current machines) that N ....

P. Christy, Software to support massively parallel computing on the MasPar MP-1, in Proceedings of IEEE Compcon Spring 1990, IEEE, February 1990.

....to a peak speed of 290 Mflops on a machine having 8192 processors. The time ratio of nearest neighbor communication to floating point computation defined as fl = Xnet[1] ff , has fl 1=5 for 64 bit operands. A more detailed general description of the MasPar MP 1 computer can be found in [6, 13, 22]. 4. Recursive Global Additive Schwarz, RGAS. 4.1. Description of the method. The idea with RGAS is to solve the coarse problem recursively using GAS. A convergence analysis of RGAS is given in [16] In order to define a recursion, we divide the coarse problem into subdomains in the standard ....

P. Christy, Software to support massively parallel computing on the MasPar MP-1, in Proceedings of IEEE Compcon Spring 1990, IEEE, February 1990.

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P. Christy. Software to support massively parallel computing on the MasPar MP-1, Proceedings of the IEEE Compcon Spring 1990, IEEE, February 1990.

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