P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pade approximation via the Lanczos process," in Proc. European Design Automation Conf., 1994.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....such as SPICE [3] may be used, but these are computationally expensive and are not conducive to use on large systems, particularly when fast noise evaluations for noise optimization purposes are required. When the system is modeled as a linear circuit, linear model order reductions such as [4, 5, 6] may be used, and these have been incorporated in a noise evaluation system [7, 8] These model order reduction techniques help in reducing the computational cost, but in several cases, the cost is still unacceptably high for an optimization system that would use a noise metric to select the ....

P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pade approximation via the Lanczos process, " IEEE Transactions on Computer-Aided Design, vol. 14, pp. 639--649, May 1995.

....is possible to derive a more efficient approach by exploiting the fact that 3 D field solvers typically use Krylov subspace based iterative methods. These iterative methods can provide more than just a solution at a particular frequency, they can be used to directly construct reduced order models [4]. In this paper, we present a numerically robust and accurate approach for computing reduced order models of magnetoquasistatic coupling in complicated 3 D structures. The approach is based on using the multipoleaccelerated program FastHenry [5] combined with the Krylov subspace based Arnoldi ....

....the transfer function (5) Pad e approximates can be computed using direct evaluation of the moments, though the approach is illconditioned, because such computation relies on a power iteration with the system matrix A. Instead, Lanczosstyle algorithms can be used that are numerically more robust [4]. B. Arnoldi based Approximations An alternative approach, which robustly generates a somewhat different approximation than Pad e, can be derived using an Arnoldi process as in the gmres algorithm. The idea behind this approach is similar to that of [4] and is that of selecting an orthonormal ....

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Peter Feldmann and Roland W. Freund. Efficient linear circuit analysis by Pad'e approximation via the Lanczos process. In EURO-DAC'94 with EURO-VHDL'94, September 1994.

....for circuit simulators to improve the simulation run time significantly. Model order reduction methods were developed to approximate the behavior of long interconnect, power and clock networks. They have been extensively used in the simulation and evaluation of high speed VLSI systems [32] 33][35]. They comprise the key factors of the original system with much lower complexity; therefore, they significantly reduce the required computation and thereby simulation time, with slight loss of accuracy. Elmore delay model [36] as the first reduced order model, is the most common technique for ....

....based on moment matching allowing a linear circuit to be analyzed for its dominant poles and corresponding residues. To overcome some numerical limitations that AWE method suffers, researchers have developed reduction methods based on Bi orthogonalization algorithms such as Pade Via Lanczos (PVL) [35] or orthogonalized Krylov subspace methods [37] which are computationally convenient and numerically better behaved. Their experimental results reveal the high accuracy within less than 5 of SPICE simulator at the speed 1000 times faster. For analytical computation, the reduced order model can ....

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P. Feldmann, and R. Freund, "Efficient Linear Circuit Analysis by Pade Approximation via the Lanczos Process," IEEE Trans. on CAD, vol. 14, no. 5, pp. 639-649, May 1995.

....brute force techniques has become impractical. A popular approach to solve this problem is model reduction, where an approximate small scale model is used in place of the original large scale system. A number of model reduction methods are available in the literature. Moment matching techniques [1, 9, 4] can be used to generate passive reduced order models for interconnects. More sophisticated methods such as balanceand truncate model reduction have also been proposed for interconnect modeling [5, 3, 6] Krylov methods such as the Arnoldi and Lanczos iterations apply naturally in the numerical ....

P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pade approximation via the Lanczos process. IEEE

....appear as excessive delay (performance degradation) overshoot undershoot (reliability drop) and positive or negative glitch (functional error) In this work, we present a test pattern generation method for long interconnects targeting integrity loss. It exploits model order reduction methodology [1] to reduce the computation required for obtaining efficient test patterns. Prior Work Many researchers have addressed the crosstalk issue at the gate level. Several analyses of crosstalk effects and causes have been reported in [2] 3] Various fault models and test pattern generation strategies ....

....Alpha chip [18] Despite its spectacular success, AWE suffers from a number of fundamental numerical limitations. To overcome these numerical limitations of moment matching methods, researchers have developed reduction methods based on bi orthogonalization algorithms such as Pade Via Lanczos (PVL) [1] or orthogonalized Krylov subspace methods [15] In our approach, we use the PVL method [1] to evolve a test pattern generation approach for detecting intermittent failures due to integrity fault (loss) on long interconnects. The PVL method was chosen because of its high accuracy, numerical ....

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Peter Feldmann, and Ronal W. Freund, "Efficient Linear Circuit Analysis by Pade Approximation via the Lanczos Process," IEEE Trans. on CAD, vol. 14, no. 5, pp. 639-649, May 1995.

....with slight loss of accuracy. Reduced order model methods were developed as an alternative for circuit level simulators to approximate the behavior of long interconnect, power and clock networks [6] On the application side of our method, we use the model order reduction methods such as the PVL [7] and SyMPVL [8] to evolve a test pattern generation approach for detecting intermittent failures due to integrity fault on long interconnects. These methods are chosen because of their high accuracy, numerical stability and ability to identify the true poles and zeros of the original system ....

....we have m n due to the possibility of fanout on some wires. The transfer function of a specific output f r (1 r m) can be represented as: s X i H ir (1) where X i s is the Laplace transform of x i (the ith input) Using an order reduction method (e.g. PVL [7] or ENOR [12] the transfer function of output f r becomes of order q: 2) where k i j and p are zeros and poles of the output f r , respectively. Note that H f r s is obtained based on the superposition of the effects of all n inputs on f r . The output of a system can be computed in the ....

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Peter Feldmann, and Ronal W. Freund, "Efficient Linear Circuit Analysis by Pade Approximation via the Lanczos Process, " IEEE Trans. on CAD, vol. 14, no. 5, pp. 639-649, 1995.

....reduction approaches is a relatively thorough control and assessment of approximation errors that is gained by formal analysis of the reduction algorithms. The most successful algorithms for reduction of large scale linear systems have been projection based approaches[1, 2] Algorithms such as PVL[3], Arnoldi methods[4] and PRIMA[5] obtain reduced models by projecting the linear equations describing the LTI model system into a subspace of lower dimension. The subspace chosen determines the approximation properties of the reduced model. These algorithms exploit the connection between Krylov ....

Peter Feldmann and Roland W. Freund, "Efficient linear circuit analysis by Pade approximation via the Lanczos process," IEEE Trans. CAD, vol. 14, pp. 639--649, May 1995.

....of robust approaches for generating low order models of interconnect. The most popular approach for computing these low order models, either directly from 3 D simulation or from extracted RLC circuits, is based on moment matching via numerically robust orthogonalized Krylov subspace methods [1, 12, 3, 10, 9]. An alternative, the Truncated Balanced Realization methods (TBR) 4, 11] have never been given serious consideration even though they generate near optimal reduced order models with a known L transfer function error bound. The difficulty with TBR methods is that they require the solution of ....

P. Feldmann and R. W. Freund. Efficient Linear Circuit Analysis by Pade Approximation via the Lanczos Process. IEEE Trans. Computer-Aided Design, Vol. 14, No.5, pp.639-649, May 1995

....it is necessary to construct low order macromodels whose terminal behaviors essentially capture the complicated 3 D field interactions among the interconnect. Most model order reduction techniques, such as asymptotic waveform evaluation (AWE) 3] and the more recent Pad evia Lanczos (PVL) [4] and Arnoldi [5] algorithms, have been successful because it is feasible to carry out an LU decomposition of the associated sparse system matrix, after which each solve can be performed cheaply. For problems involving large dense matrices, direct factorization is computationally intractable. ....

....circuit simulator. Instead, reduced order models, which use small matrices to capture the current voltage relations at the terminal ports of the interconnect, can be extracted from the full model and then used in the coupled simulation. Techniques such as asymptotic AWE [3] and the PVL algorithm [4] have been used successfully for this purpose. In this section, we summarize previous work on the similar Arnoldi [16] algorithm, a numerically robust orthogonal projection based scheme which generates guaranteed stable reduced order models [17] Consider the single input single output (SISO) ....

P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pad e approximation via the Lanczos process," in Proc. Euro-DAC, Sept. 1994, pp. 170--175.

.... and d are obtained by matching the first (p q 1) 3 Taylor series coefficients of G(s) cA ib so cled moments) and (s) Dirtly com STypicly q = p I since one from the eigen reprentation that the denominator of G(s) h an extra power of s 29 puting the moments is numerically unstable and [14] demonstrates a stable method using biorthogonal Lanczos. 2.6.2 Eigen Analysis It has been a traditional approach to perform eigenanalysis to generate the the re duced model i.e. to determine a reduced model of dimension r (instead of N) one determines the set of eigenvectors corresponding to ....

P. Feldmann and R.W. Freund, "Efficient Linear Circuit Analysis by Pade' Ap- proximation via the Lanczos Process", IEEE Transactions on CAD of Integrated Circuits and Systems, Vol. 14, No. 5, 639-649, May 1995.

....the target application, interconnect synthesis, requires parameterized models valid over a wide geometric range. Second, the technique described below is a multi parameter extension of the projection subspace based moment matching methods that have proved so effective in interconnect modeling [12, 13, 10, 9, 8, 7, 11]. In the following section we present the basic background on multi parameter model order reduction for a two parameter case, and then in section three we describe the generalization to an arbitrary number of parameters. In section four, we demonstrate the effectiveness of the method on a ....

P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pade approximation via the Lanczos process. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 14:639--649, 1995.

....circuit elements can be in the tens of thousands. Such PEEC generated circuits are much too expensive to include in a SPICE level simulator. Recently, numerically robust model order reduction techniques have been developed to automatically generate a low order model from large circuit models [2] [6] In their basic form, however, these reduction methods require LU factorization of the original dense circuit matrices whose computational complexity is still too expensive. Additionally, since the interconnect is passive, it is important that the reduced order model preserve this property, ....

P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pade approximation via the Lanczos process," in EURO-DAC'94 with EURO-VHDL'94, Sept. 1994.

....such structures using recently developed acceler ated methods ( 1] 2] but these methods are still too slow to be used in system level simulation and optimization. Some form of macromodeling, or model reduction, is required. There are many approaches to model order reduction (i.e. 3] [4]) and herein we describe an approach based on adapting the techniques in [3] 5] These previous approaches exploited the fact that system matrices were explicitly available, and that is not the case when using accelerated 3 D solvers. In addition, much more accu rate models can be developed by ....

P. Feldmann and R.W. Freund, "Efficient Lin- ear Circuit Analysis by Pade' Approximation via the Lanczos Process," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 14, No. 5, 639-649, May 1995..

....interconnect. The now standard approach to efficient circuitinterconnect simulation is to represent the interconnect with moment matching based reduced order models [19, 2, 9] Accurate computation of such models can be accomplished using bi orthogonalization algorithms like Pade via Lanczos (PVL) [5], or with methods based on orthogonalized Krylov subspace methods [17, 1, 20] Another approach to computing these reduced order models is the Truncated Balanced Realization (TBR) 8] TBR produces a reduced model which is often close to the optimal Hankel norm approximation, and also has a known ....

P. Feldmann and R. W. Freund. Efficient Linear Circuit Analysis by Pade Approximation via the Lanczos Process. IEEE Trans. Computer-Aided Design, Vol. 14, No.5, pp.639-649, May 1995

....high accuracy is desired, the models generated can become excessively large and difficult to solve for a continuous range of frequencies. The need for reduced size models leads us to consider Model Order Reduction (MOR) techniques, which have been developed in the field of parameter extraction [1, 2, 3, 4, 5, 6, 7, 8, 9]. Our approach, which is based on a combination of nodal analysis formulation with a mesh analysis formulation, has significant advantages over previously reported methods, both in extraction speed and model size, making it possible to generate guaranteed passive low order models for efficient ....

....information is necessary from DC up to the highest frequency of interest in the circuit. Thus, it is essential to have models valid for a continuous range of frequencies. 3G UARANTEED PASSIVE MODEL ORDER REDUCTION AND INTERCONNECT SIMULATION Recently, Model Order Reduction (MOR) algorithms [1, 2, 5, 9, 6] have been presented to solve this problem. The basic idea of MOR techniques is to reduce the size of the system described by the circuit equations, usually written in a convenient state space form, to a much smaller one that still captures the dominant behavior of the original system. This ....

P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pade approximation via the Lanczos process. IEEE Trans. on ComputerAided Design of Integrated Circuits and Systems, 14:639--649, 1995.

....provides an efficient and accurate solution to insert buffers. Efficient and accurate interconnect delay estimation can significantly enhance the convergence of the design cycle. Since AWE was introduced in [9] many circuit simulation methods via Pad e approximation have been widely proposed [44, 45, 42]. In spite of the stability and precision of Pad e approximation, there is still no error bound in the time domain. In chapter 8, we present an extension of AWE that matches the moments at the conformal mapped domain and also provides an error bound in the time domain. Uniform Wire Sizing for ....

....of the Elmore delay model cannot guarantee that an optimized net will meet a particular slope or delay requirement when actually simulated with a circuit simulator. Furthermore, recent advances in the analysis of RC circuits like Asymptotic Waveform Evaluation [9] and PVL (Pad e via Lanczos) [44] which enable efficient computation of electrical information like delay and slope allow for the use of more accurate delay models even during optimization at the expense of a reasonable increase in computation time. In this chapter we propose a new technique for spec based buffer insertion in RC ....

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P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pad'e approximation via the Lanczos process", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, , 14:639-649.

....tables of parameters with this approach is generally expensive and error prone. Packages, substrates, and spirals can be modeled with large lumped networks, but such systems can be too large to be efficiently incorporated into a time domain simulation, and so some form of reduction is necessary [11], 42] D. Semiconductor Models The semiconductor models used by RF simulators must accurately model the high frequency, small signal behavior of the devices to accurately predict the behavior of RF circuits. BJT s have long been used in high frequency analog KUNDERT: INTRODUCTION TO RF ....

P. Feldmann and R. Freund, "Efficient linear circuit analysis by Pad e approximation via the Lanczos process," IEEE Trans. Computer-Aided Design, vol. 14, pp. 639--649, May 1995.

....and design of large scale RLC systems can stretch the limits of computing resources. Model reduction, i.e. finding an approximate model with far fewer variables, is one technique that facilitates the analysis and design of large scale systems. One well known approach is moment matching [1, 2, 3]. This work was supported in part by NSF under contract number CCR 9984553, SRC under contract number 99 TJ 689, and Purdue Research Foundation. 1 We use the term square root to mean the not necessarily symmetric square root of a matrix: If M = M T = NN T , we say N is the square ....

P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pade approximation via the Lanczos process. IEEE Trans. Computer-Aided Design, 14:639--649, May 1995.

....argument can be made in favor of the approach in this paper. Accurate expressions for the delay in transistor circuits are important for simulation and timing verification, and 37 approximations based on the first few moments seem to be very well suited for this purpose (see, for example, [PR90, FF95, GGV94b, GGV94a]. For delay optimization, however, these expressions lead to complicated non convex optimization problems, with possibly many local minima. This is already the case for the Elmore delay (the first moment of the transfer function) of a grounded capacitor RC circuit with loops of resistors. ....

P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pad'e approximation via the Lanczos process. IEEE Transactions on Computer-Aided Design, 14(5):639-- 649, 1995.

....in the design and monitoring of algorithms which produce and use the reduction, but it is also an important part of the solution of some problems. The very readable paper [6] by Freund and Feldmann clearly describes the elegant and useful new application of the Lanczos algorithm [8] see also [5], and also shows how the sensitivity of the reduction (1.1) leads to the required sensitivities of the computed results. There it is shown how the sensitivity with respect to some given parameter p can be computed along with the Lanczos vectors in an extended Lanczos algorithm. Here we will treat ....

P. Feldmann and R. Freund. Efficient linear circuit analysis by Pad'e approximation via the Lanczos process. IEEE Trans. Computer-Aided Design, 14:639--649, May 1995.

....high accuracy is desired, the models generated can become excessively large and difficult to solve for a continuous range of frequencies. The need for reduced size models leads us to consider Model Order Reduction (MOR) techniques, which have been developed in the field of parameter extraction [1, 2, 3, 4, 5, 6, 7, 8, 9]. Our approach, which is based on a combination of nodal analysis formulation with a mesh analysis formulation, has significant advantages over previously reported methods, both in extraction speed and model size, making it possible to generate guaranteed passive low order models for efficient ....

....information is necessary from DC up to the highest frequency of interest in the circuit. Thus, it is essential to have models valid for a continuous range of frequencies. 3G UARANTEED PASSIVE MODEL ORDER REDUCTION AND INTERCONNECT SIMULATION Recently, Model Order Reduction (MOR) algorithms [1, 2, 5, 9, 6] have been presented to solve this problem. The basic idea of MOR techniques is to reduce the size of the system described by the circuit equations, usually written in a convenient state space form, to a much smaller one that still captures the dominant behavior of the original system. This ....

P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pade approximation via the Lanczos process. IEEE Trans. on ComputerAided Design of Integrated Circuits and Systems, 14:639--649, 1995.

....verification of multi million gate, deep submicron logic circuits. Therefore, in general, the proper tradeoff between speed and accuracy must be found. Moreover, the gate delay model must be consistent with the algorithm used to compute the interconnect delay, e.g. AWE [1] 2] 3] and PVL [4]. Usually, circuit delays are expressed as functions of the input signal transition time (T IN ) and of the load capacitance (C L ) often in the form of look up table models or analytical expressions, the so called k factor equations, in which the delay is expressed by means of a polynomial ....

P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pade' approximation via the Lanczos process", IEEE Trans. Computer-Aided Design, 1995, vol. 14, N. 5, pp. 639-649.

....clock trees, and long off chip interconnects where important design issues such as #I noise, clock skew, and EMI effects must, respectively, be addressed. The basic theoretical concept for producing reducedorder models for large linear circuits has been Pad eapproximation or its variations [2, 3, 4, 5, 6, 7]. While the Pad e approximation is mathematically simple to describe and relatively easy to compute, it does not always generate models that satisfy the fundamental circuit theoretic properties of interconnect networks. Arguably, the most glaring shortcoming of Pad e approximation algorithms is ....

....circuit theoretic properties of interconnect networks. Arguably, the most glaring shortcoming of Pad e approximation algorithms is that the reduced order models they generate often fail to preserve the stability of the interconnect circuit. While some of the stability problems are purely numerical [7], some others are inherent in the Pad e approximation concept itself [1] A model order reduction algorithm based on the Arnoldi iteration was recently shown to generate provably stable reduced order transfer functions for RLC interconnect networks [1] It is well known [8] that multiport RLC ....

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P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pade approximation via the Lanczos process. IEEE Trans. CAD, 14:639--649, May 1995.

....argument can be made in favor of the approach in this paper. Accurate expressions for the delay in transistor circuits are important for simulation and timing verification, and approximations based on the first few moments seem to be very well suited for this purpose (see, for example, 50] [51], 52] 53] For delay optimization, however, these expressions lead to complicated non convex optimization problems, with possibly many local minima. This is already the case for the Elmore delay (the first moment of the transfer function) of a grounded capacitor RC circuit with loops of ....

P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pad'e approximation via the Lanczos process," IEEE Transactions on Computer-Aided Design, vol. 14, no. 5, pp. 639--649, 1995.

.... be computed using direct evaluation of the moments,followed by a moment matching procedure [12, 2] In order to accurately compute higher order Pad e 3 approximates, it is necessary to use successive bi orthogonalization combined with lookahead, as in the recent nonsymmetric Lanczos algorithms [13, 14]. Although nonsymmetric Lanczos methods plus lookahead can be used to generate Pad e approximates of arbitrarily high order, there is no guarantee that a given approximate will be stable. It is therefore essential to postprocess the Pad e approximate before using it in a circuit simulation ....

Peter Feldmann and Roland W. Freund. Efficient linear circuit analysis by Pad e approximation via the Lanczos process. In EURO-DAC'94 with EURO-VHDL'94, September 1994. 17

....be a very inefficient approach. A standard way to improve the efficiency of coupled circuit interconnect simulation is to use Pad e based reduced order models [2, 3, 4, 5, 6] Accurate computation of such models can be accomplished using bi orthogonalization algorithms like Pad e via Lanczos (PVL) [7], but the resulting Pad e approximates can still be unstable even when generated from stable RLC circuits. Such reduced order models must be post processed to eliminate the unstable modes, but such methods which also preserve moment matching properties are not guaranteed [8] It has been shown ....

....and the block Arnoldi algorithm. Figures 2 and 3 plot the magnitude of the gain and the output impedances of the amplifier. As is clear from the frequency response plots, the Arnoldi and Pad e approximations are of similar accuracy. 14 5. 3 PEEC Example The following example was introduced in [7]. The network is the lumped element equivalent circuit for a three dimensional problem modeled via PEEC. The circuit consists of 2100 capacitors, 172 inductors and 6990 inductive couplings, resulting in a 304 Theta 304 dense MNA matrix. In [7] it was shown that a 60 th order approximation ....

[Article contains additional citation context not shown here]

P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pad e approximation via the Lanczos process. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 14:639--649, 1995.

....The full set of Arnoldi vectors spans the same solution space as the system eigenvectors. An efficient reduced set can be constructed by considering both inputs and outputs of interest. Pad ebased reduced order models have been developed for linear circuit analysis using the Lanczos process [9]. This approach matches as many moments of the system transfer function as there are degrees of freedom in the reduced system. While the Arnoldi vectors match only half the number of moments as the Pad e approximation, they preserve system definiteness and therefore often preserve stability [10] ....

.... in a McLaurin expansion of the transfer function (29) We can write H(s) Gamma 1 X k=1 m k s k ; 32) where m k = c T A Gamma(k 1) b (33) is the kth moment of H(s) A qth order Pad e approximation can be constructed via the Lanczos process and will match the first 2q moments of H(s) [9]. An alternative approach is to use the Arnoldi method to generate a set of vectors which spans the qth order Krylov subspace defined by K q (A; b) spanfA Gamma1 b; A Gamma2 b; A Gammaq bg: 34) The set of q Arnoldi vectors matches q moments of the system transfer function, that ....

P. Feldmann and R.W. Freund. Efficient Linear Circuit Analysis by Pad'e Approximation via the Lanczos Process. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 14:639--649, 1995.

.... The now standard approach to efficient circuit interconnect simulation is to represent the interconnect with moment matchingbased reduced order models [19, 2, 9] Accurate computation of such models can be accomplished using bi orthogonalization algorithms like Pad e via Lanczos (PVL) [5], or with methods based on orthogonalized Krylov subspace methods [17, 1, 20] Another approach to computing these reducedorder models is the Truncated Balanced Realization (TBR) 8] TBR produces a reduced model which is often close to the optimal Hankel norm approximation, and also has a known ....

P. Feldmann and R. W. Freund. Efficient Linear Circuit Analysis by Pad'e Approximation via the Lanczos Process. IEEE Trans. Computer-Aided Design, Vol. 14, No.5, pp.639-649, May 1995

....is possible to derive a more efficient approach by exploiting the fact that 3 D field solvers typically use Krylov subspace based iterative methods. These iterative methods can provide more than just a solution at a particular frequency, they can be used to directly construct reduced order models [4]. In this paper, we present a numerically robust and accurate approach for computing reduced order models of magnetoquasistatic coupling in complicated 3 D structures. The approach is based on using the multipole accelerated program FastHenry [ combined with the Krylov subspace based Arnoldi ....

....transfer function (5) Pad e approximates can be computed using direct evaluation of the moments, though the approach is ill conditioned, because such computation relies on a power iteration with the system matrix A. Instead, Lanczos style algorithms can be used that are numerically more robust [4]. 3.2 Arnoldi based Approximations An alternative approach, which robustly generates a somewhat different approximation than Pad e, can be derived using an Arnoldi process as in the gmres algorithm. To appear in IEEE Trans. on Components, Packaging, and Manufacturing Tech. Part B: Adv. ....

[Article contains additional citation context not shown here]

Peter Feldmann and Roland W. Freund. Efficient linear circuit analysis by Pad'e approximation via the Lanczos process. In Proceeding of the Euro-DAC, September 1994.

....on a multi input multi output (MIMO) linear dynamical system dx dt = Ax(t) V w(t) y(t) U T x(t) where A 2 C N ThetaN , V 2 C N Thetam , U 2 C N Thetan , and w(t) y(t) and x(t) are vector valued functions of length m;n and N , respectively. See, for instance, [4, 5, 7, 8]. Corresponding to this system is the matrix valued transfer function F (z) mapping the input W (z) to the output Y (z) in frequency domain: Y (z) U T (zI Gamma A) Gamma1 V Delta W (z) j F (z) Delta W (z) 1 X i=1 M i z i Delta W (z) where we show the expansion of the ....

P. Feldmann and R. Freund, Efficient linear circuit analysis by Pad'e approximation via the Lanczos process, IEEE Trans. Computer-Aided Design 14 (1995), 639-649.

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P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pad'e approximation via the Lanczos process. IEEE Trans. Computer-Aided Design, 14:639--649, 1995.

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P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pad'e approximation via the Lanczos process. In Proceedings of EURO-DAC '94 with EURO-VHDL '94, pages 170--175, Los Alamitos, California, 1994. IEEE Computer Society Press.

....methods for the computation of Pade approximations of linear systems are Krylovsubspace techniques, in particular, variants of the Lanczos [26] and Arnoldi algorithms [2] which are efficient and numerically stable. Lanczos type algorithms, as implemented in the Pade via Lanczos (PVL) algorithm [8, 9, 14, 13], produce the most efficient approximations. For the same order of approximation and computational effort they match twice as many moments as the Arnoldi algorithm [6, 34, 42] However, in certain cases, Lanczos based methods may produce non passive reduced order models of passive linear systems. ....

P. Feldmann and R.W. Freund. Efficient linear circuit analysis by pade approximation via the lanczos process. IEEE Trans. Computer-Aided Design, 14:639--649, May 1995.

.... be obtained by first explicitly computing the leading q(n) Taylor coefficients of the expansion of H about s 0 and then generating Hn from these coefficients; see, e.g. 16] However, any approach based on explicitly computing the Taylor coefficients of H is inherently numerically unstable; see [17]. A much better alternative is to use block Krylov subspace methods that obtain the same information as contained in the leading q(n) Taylor coefficients of H, but in a more stable manner. Before block Krylov subspace methods can be employed, the two matrices G and C in the definition (3) of H ....

Feldmann P. and Freund R.W. Efficient linear circuit analysis by Pad'e approximation via the Lanczos process. IEEE Trans. Computer-Aided Design, 14, pp. 639--649, 1995.

....of algorithms for matrix computations. For example, the classical Lanczos process [19] for nonsymmetric matrices, fast solvers for linear systems with Hankel structure [14] and the computation of Pad e approximants of transfer functions of single input single output linear dynamical systems [6,10] are all closely related to formally orthogonal polynomials. Furthermore, the theory of formally orthogonal polynomials has proven to be useful for developing more robust versions of these algorithms. For instance, the look ahead variants [12,17,22] of the Lanczos process, which remedy possible ....

P. Feldmann and R.W. Freund, Efficient linear circuit analysis by Pad'e approximation via the Lanczos process, IEEE Trans. Computer-Aided Design 14 (1995), 639--649.

.... preserve the stability of the original system; see, e.g. 1,14,31] For some applications, such as the use of Pad e based reducedorder models for the efficient computation of the frequency response of largescale linear dynamical systems, the possible occurrence of unstable poles is not an issue [12]. However, often reduced order modeling is used to replace large linear subsystems of a stable, possibly nonlinear, system by smaller approximate models, with the goal to reduce the complexity of the simulation of the overall system. In this context, it is crucial that the reduced order models of ....

....the coefficients of the numerator and denominator polynomials of H n via the solution of systems of linear equations with coefficient matrix M n . However, in general, due to the typical ill conditioning of M n , this approach is feasible only for very moderate values of n, such as n 10; see [12] for examples. Fortunately, these numerical difficulties can easily be avoided by exploiting the well known connection [23] between Pad e approximants H n and the Lanczos process [26] Next, we state this connection. The starting point is the representation (4) of H. We apply the nonsymmetric ....

[Article contains additional citation context not shown here]

P. Feldmann, R.W. Freund, Efficient linear circuit analysis by Pad'e approximation via the Lanczos process, IEEE Trans. Computer-Aided Design 14 (1995) 639--649.

....H n to the transfer function H in (4) is given by H n (s) l T r) e T 1 (I Gamma (s Gamma s 0 ) T n ) Gamma1 e 1 ; 16) where e 1 denotes the first unit vector of length n. For a proof of (16) we refer the reader to [12] or [23] Computing H n via (16) has been advocated in [11,12,21], and following [11,12] this approach is now known as the PVL (Pad e via Lanczos) method. 3.3 Poles and zeros of H n Using Cramer s rule, the representation (16) of H n can be rewritten as H n (s) l T r) det(I n Gamma1 Gamma (s Gamma s 0 ) T 0 n ) det(I n Gamma (s Gamma s 0 ) T n ) ....

....function H in (4) is given by H n (s) l T r) e T 1 (I Gamma (s Gamma s 0 ) T n ) Gamma1 e 1 ; 16) where e 1 denotes the first unit vector of length n. For a proof of (16) we refer the reader to [12] or [23] Computing H n via (16) has been advocated in [11,12,21] and following [11,12], this approach is now known as the PVL (Pad e via Lanczos) method. 3.3 Poles and zeros of H n Using Cramer s rule, the representation (16) of H n can be rewritten as H n (s) l T r) det(I n Gamma1 Gamma (s Gamma s 0 ) T 0 n ) det(I n Gamma (s Gamma s 0 ) T n ) 17) where T 0 n is ....

[Article contains additional citation context not shown here]

P. Feldmann, R.W. Freund, Efficient linear circuit analysis by Pad'e approximation via the Lanczos process, in: Proceedings of EURO-DAC '94 with EURO-VHDL '94, IEEE Computer Society Press, Los Alamitos, CA, 1994, pp. 170--175. 27

.... be obtained by first explicitly computing the leading q(n) Taylor coefficients of the expansion of H about s 0 and then generating H n from these coefficients; see, e.g. 25] However, any approach based on explicitly computing the Taylor coefficients of H is inherently numerically unstable; see [8]. A much better alternative is to use block Krylov subspace methods that obtain the same information as contained in the leading q(n) Taylor coefficients of H, but in a more stable manner. Before block Krylov subspace methods can be employed, the two matrices G and C in the definition (12) of H ....

P. Feldmann and R.W. Freund, Efficient linear circuit analysis by Pad'e approximation via the Lanczos process, IEEE Trans. Computer-Aided Design 14 (1995) 639--649.

....T X(s) 8) The smaller matrices are obtained by projection of the original system matrices into well chosen subspaces. Depending on the choice of the spaces and of the projection, model reduction methods can achieve different desired properties. The PVL (Pade via Lanczos) family of algorithms [1, 3] first transforms the system matrix G sC into I sA by a change of variables. Here, A = G s 0 C) Gamma1 C, and s 0 is the frequency domain expansion point. The new system matrix is projected from the left and the right onto the block Krylov subspaces spanned by [R; AR;A 2 R; and ....

P. Feldmann and R. Freund. Efficient linear circuit analysis by Pade approximation via the Lanczos process. In Proceedings of the European Design Automation Conference, Sep 1994.

....numerator and denominator degree at most n Gamma 1 and n, respectively, such that the Taylor expansions of Hn and H about s = 0 match in as many leading Taylor coefficients as possible. The Pad e approximant Hn can be directly obtained from the Lanczos process applied to A, r, and l; see, e.g. [12, 22, 23]. Indeed, assuming for simplicity that no look ahead steps occur in the Lanczos algorithm, the n th Pad e approximant is simply given by Hn (s) l T r e T 1 i I n Gamma s T (s) n j Gamma1 e 1 ; 1.3) where I n is the n Theta n identity matrix and e 1 is the first unit vector of ....

P. Feldmann and R. W. Freund, Efficient linear circuit analysis by Pad'e approximation via the Lanczos process, IEEE Trans. Computer-Aided Design 14 (1995), 639--649.

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P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pade approximation via the Lanczos process," in Proc. European Design Automation Conf., 1994.

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P. Feldmann and R.W. Freund , "Efficient Linear Circuit Analysis by Pade Approximation via Lanczos Process" , IEEE Trans. On computerAided Design, vol.14, No.5, pp. 639-649, May 1995.

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P. Feldmann, R. W. Freund, "Efficient Linear Circuit Analysis by Pade Approximation via the Lanczos Process," IEEE Trans. CAD, vol. 14, pp. 639-649, May 1995.

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P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pade approximation via the Lanczos process, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 14, No. 5, May 1995, pp. 639-649.

No context found.

P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pade approximation via the Lanczos process. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 14:639--649, 1995.

No context found.

FELDMANN,P.,AND FREUND, R. W. Efficient linear circuit analysis by Pade approximation via the Lanczos process. IEEE Trans. Computer-Aided Design 14 (May 1995), 639--649.

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P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pad e approximation via the Lanczos process. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 14:639--649, 1995.

No context found.

P. Feldmann and F. W. Freund, "Efficient linear circuit analysis by pad e approximation via the lanczos process," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 14, no. 5, pp. 639--649, May 1995.

No context found.

P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pade approximation via the Lancozos process," IEEE Trans. Computer-Aided Design, vol. 14, pp. 639--649, May 1995.

No context found.

Peter Feldmann and Roland W. Freund. Efficient linear circuit analysis by Pad'e approximation via the Lanczos process. In Proceeding of the Euro-DAC, September 1994.

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