C. Zhu and P. Yew, "A Synchronization Scheme and its Application for Large Multiprocessor Systems ", Proceedings of the 4th Int'l Conference on Distributed Computing Systems, May 1984, pp.486493.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....section we describe the compare swap operation, the A B A problem and its solution. 1. 3 The A B A Problem We use the implementation of the compare swap operation found in the IBM 370 architecture (the synchronization primitive proposed for the Cedar supercomputer at the University of Illinois [14] has all the capabilities of compare swap) It is a three operand atomic instruction of the form CS(A,B,C) A, B and C are one word variables. 1 The instruction does the following: If A equals C then put B into C , return condition code 0 else put C into A , return condition code 1 It is ....

C.-Q Zhu and P.-C. Yew. A Synchronization Scheme and its Applications for Large Multiprocessor Systems. Proceedings of the 4th International Conference on Distributed Computing Systems, pp. 486-493, May 1984.

....byte or halfword write: the full word is read, modified, and stored back. The second implementation method seems much preferable in large shared memory multiprocessors. It is used in the NYU Ultracomputer and IBM RP3 (which use combining) and in the BBN Butterfly [RT] and Univ. of Illinois Cedar [ZY] (which do not use combining) 1 We assume in the sequel 1 Unfortunately, usual commercial processors do not have a machine instruction that executes an atomic store load extended cycle. The NYU Ultracomputer, IBM RP3 machine, BBN Butterfly, et al. emulate ....

....A, then a combined store may have to carry a distinct store value for each state. This is tractable when the number of states is small, such as when a full empty bit is used; it is not tractable when the number of states is large. For example, the synchronization primitives defined by Zhu and Yew [ZY] for the Cedar machine at the University of Illinois and by Pier and Gajski [GP] use full word tags. With m bit tags, there are 2 m possible states, and 2 m is the best possible uniform bound on the number of store values in a combined request. Memory accesses controlled by a regular automaton ....

Zhu and Yew, A Synchronization Scheme and Its Applications for Large Scale Multiprocessor Systems, Proc. Conf. on Distributed Computing Systems, pp. 486-491, 1984. Ultracomputer Note 105

....are there possible duplicate instructions with different bit patterns. In addition, some redundant sync instructions mentioned in [1] have been deleted. These are summarized in Appendix A. Some uses of the sync processor for data synchronization and data structure manipulation are described in [2] [3] [4] 5] The bit patterns for each instruction word defined in this document are all usable bit patterns of the 32 bit instruction word. All bit patterns of the instruction word that are not defined in this document are reserved and may not be used in any manner. Each sync processor instruction ....

C. Zhu and P. Yew, "A Synchronization Scheme and its Application for Large Multiprocessor Systems ", Proceedings of the 4th Int'l Conference on Distributed Computing Systems, May 1984, pp.486493.

....order of the processes. 2.1 Assumptions We make the following assumptions about the computing environment: 1. The underlying multiprocessor architecture supports an atomic Compare Swap instruction. We note that many parallel architectures support this instruction, or a related instruction [13, 21, 3, 28]. 2. The multiprocessor has shared memory with coherent caches, or has locally stored but globallyaccessible shared memory. 3. Each processor has a record to place in the queue for each lock. In a NUMA architecture, this record is allocated in the local, but globally accessible, memory. This ....

C.-Q Zhu and P.-C. Yew. A synchronization scheme and its applications for large multiprocessor systems. In Proceedings of the 4th International Conference on Distributed Computing Systems, pages 486--493, 1984.

....are unknown at compile time, we can still perform the dependence analysis at runtime and maybe execute the loop in parallel. This approach is called runtime parallelization. Much previous research has been done to design effective runtime parallelization algorithms [KS88, LZ93, MP87, SMC91, ZY84, ZY87] The main differences between the schemes proposed are the types of dependence patterns that are handled and the required system or architecture support. In all cases, however, the key to success is to minimize the time spent on the analysis of dependences and synchronization. Indeed, if ....

....better to keep the loop serial. In this chapter, we describe and evaluate a new scheme for the runtime parallelization of loops. Our scheme handles any type of dependence pattern without requiring any special architectural support. Furthermore, compared to an older scheme with the same generality [ZY84] it speeds up execution by significantly reducing the amount of communication required and by increasing the overlap among dependent iterations. The effectiveness of this algorithm is evaluated via measurements in the 32processor Cedar shared memory multiprocessor [K 93] The results show ....

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C.-Q. Zhu and P.-C. Yew. A synchronization scheme and its application for large multiprocessor systems. In 4h Int. Conf. on Distributed Computing Systems, pages 486--493, May 1984.

.... or key fields for controlling access to the associated variable, e.g. the full empty flags on the HEP [Jor83] the empty bit associated with each element of the I structure proposed by Arvind for dataflow computation [ANP89] and the synchronization key fields proposed by Zhu and Yew and by Peir [Pei83, ZhY84]. Other proposals for hardware support of version consistency include algorithms for improving the efficiency of barrier synchronization [Bro86, HFM88, Jay87] 21 2.4. LOGICAL TIME CONCURRENCY CONTROL Concurrency control systems can be classified depending on whether they enforce the ordering ....

C. Q. Zhu and P. C. Yew, A Synchronization Scheme and its Application for Large Multiprocessor Systems, Proc. of the 4th Int. Conf. on Distributed Computing Systems, 1984, 486-493.

....the state of the object, computes its modifications, then attempts to commit its modification. If no conflicting operation has modified the object, the commit is successful, and the operation is finished. Otherwise, the operation tries again. The operation typically uses the compareand swap [65, 9, 43] atomic read modify write instruction to try to commit its modifications (one work uses the load locked store conditional instruction [22] and several special architecture that support lock free algorithms have been developed [23, 56] While many additional non blocking and lock free algorithms ....

C.-Q Zhu and P.-C. Yew. A synchronization scheme and its applications for large multiprocessor systems. In Proceedings of the 4th International Conference on Distributed Computing Systems, pages 486--493, 1984. Concurrency Throughput 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8

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C. Zhu and P. Yew, "A Synchronization Scheme and its Application for Large Multiprocessor Systems ", Proceedings of the 4th Int'l Conference on Distributed Computing Systems, May 1984, pp.486493.

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