F. A. Tobagi, "Fast packet switch architectures for broadband integarted services digital networks," in Proc. IEEE, vol. 78, no. 1, Jan. 1990, pp. 133--167.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....is packetized and carried in fixed length cells. Each cell consists of 53 octets comprising a five octet header and a 48 octet information field. Various architectures for ATM switches, which are also called fhst packet switches, have been proposed and can be found in two survey papers [2] [3]. Among those architectures, switches with output queues have been proven to give the best delay throughput performance [4] Fig. 1 shows a large scale ATM switch fabric with output queues pro posed by Chao [5] It is an improved version of the Knockout switch [6] and is capable of accommodating ....

F. A. Tobagi, "Fast packet switch architectures for broadband inte grated services digital network," Proc. IEEE, vol. 78, no. 1, pp. 133-167, Jan. 1990.

.... modes, etc [4,5] Cell sequence on a virtual channel is preserved, a very low cell loss probability must be guaranteed ( 10 2 ) and intensive error and flow control protocols are specified with nominal rates of 155.52 Mbps and 622.08 Mbps [6,7] Many architectures have been proposed [8], all approaches point to the need of a very high speed hardware switch because of the involved high transfer rates. On the other hand, due to the statistical multiplexing, buffering is also required in order to avoid packet loss whenever there are multiple input packets arriving simultaneously ....

F. A. Tobagi, "Fast Packet Switch Architecture for Broadband Integrated Services Digital Networks," Proc. IEEE, Vol.78, No.1, pp.123-167, Jan. 1990.

....from a source be delivered to multiple destinations. Multicasting will become an important feature for any switching network designed to support broadband integrated service digital networks (B ISDN) Generally speaking, packet switch architectures can be divided into three major categories [1]: the shared memory packet switch, the shared medium packet switch and the space division packet switch. Theoretically, each of these three architecture types can be modified to support multicast. However, in shared memory and shared medium architectures, there is a scalability problem as the need ....

....build a multicast switch fabric using MIN design by either placing a copy network at the front of the routing network or integrating the cell replication function into the switch element. The intuitively obvious approach is to employ a copy network in tandem with a point to point routing network [1,2,3,4,5]. The copy network replicates the incoming cell according to the fanout number specified in the header. The routing network uses the output of the copy network as its input and routes each of the copies to its destination. Many of proposed multicast networks follow this approach, including Lee s ....

F.A. Tobagi, "Fast Packet Switch Architectures For Broadband Integrated Service Digital Networks", Proceedings of the IEEE, Vol.78, No.1, p.p. 90-167, January, 1990

....require low delays but are more resilient to loss, while the situation is the reverse with data. This places stringent perfor mance requirements on the associated ATM switches, and has lead to extensive research in the design of fast packet switches (FPS) A variety of FPSs have been proposed [1, 15, 20], and, as pointed out by [15] a unique classification of the FPS designs is difficult to obtain. Further, the choice of a particular FPS is not simple either, due to tradeoffs in cost and performance. Specifically, while switches with input queuelug are fairly inexpensive to implement [2] they ....

F. A. Tobagi, "Fast packet switch architectures for broadband integrated services dig- ital network," Proceedings of the IEEE, vol. 78, no. 1, pp. 133-167, 1990.

.... For this reason, distributed interconnection networks and cross bars have been gradually replacing busses in most large scale multiprocessors [12, 13, 14, 26] while the architecture of most high performance communication switches is inherently based on point to point interconnections [16] [27]. A simplified diagram of a high speed point to point interface is illustrated in Figure 2.3. The synchronization scheme used in this system is similar to that used in high speed busses. Each of the two IC s sends data to the other through a dedicated channel of parallel transmission lines. A ....

F. Tobagi, "Fast Packet Switch Architectures for Broadband Integrated Services Digital Networks," Proceedings of the IEEE, vol. 78, no. 1, pp. 133-167, Jan 1990.

....for virtual reality training, requires broader bandwidth than existing communications networks can provide. Thus, it would be highly desirable to integrate and transport military applications traffic over ATM based networks. Various ATM switch architectures have been proposed in recent years [1, 2, 3]. The performance, advantages disadvantages, limitations, and inherent problems of each of these switches are mostly determined by two factors: switch fabric and buffering strategy. However, there exists a trade off between different design approaches and, thus, it is difficult to say that one ....

....common memory; whether it is shared among all output ports on an on demand basis or partitioned and dedicated to each output port. Since the on demand basis memory sharing requires less memory than the separate memory dedication, an efficient memory sharing is regarded as an important design issue [2]. Another technical issue in implementing a largescale switch is how to relieve the speed bottleneck of the control logics and memory circuits that must operate fast enough to write and read N incoming cells at each time slot. A bit slice memory organization is regarded as a common solution. A ....

F. Tobagi, "Fast packet switch architectures for broadband integrated services digital networks," Proceedings of the IEEE , vol. 78, no. 1, pp. 133--167, Jan. 1990.

....2 can go ahead in the empty slot. 7 the mapping operation. These techniques include shared memory switching [Condruse 87] shared medium switching [Gopal 87] or space division switching fabrics (like banyan switches) Hui 87] A survey of switching schemes can be found in [Ahmadi 89] or [Tobagi 90] In this thesis, we make no assumptions regarding the switching scheme used, as long as the switch model proposed below is valid. An ATM switch can be modeled as a set of input queues terminating the incoming links, connected through an interconnection network to a set of output queues ....

F A Tobagi, "Fast packet Switch Architectures for Broadband Intergated Services Digital Networks", Proceedings of the IEEE, Januray 1990, vol. 78, No. 1,, pp. 133-167.

....9. When the destination egress port(s) has retrieved the packet, it notifies the system controller, and the memory location is made available for new traffic. 30 4. Typical Switch Fabrics of Routers Switch fabric design is a very well studied area, especially in the context of ATM switches [48][49] so in this section, we examine briefly the most common fabrics used in router design. The switch fabric in a router is responsible for transferring packets between the other functional blocks. In particular, it routes user packets from the input modules to the appropriate output modules. The ....

. F. Tobagi, "Fast Packet Switch Architectures for Broadband Integrated Services Digital Networks," Proc. of the IEEE, Vol. 78, Jan. 1990, pp. 133 - 178.

....control of the switch fabric. The controller can be used with a replicated banyan network fabric that provides suf Thetacient switching bandwidth. 1 Introduction A wide variety of banyan based network architectures have been developed to overcome the performance limitations imposed by blocking[9]. Many designs place control logic in the switches to buffer and or route packets. Packets which cannot be routed correctly due to contention may be dropped or passed through the switch fabric using deection routing. Packets which exit the network at an incorrect destination are undeliverable, ....

F. A. Tobagi. Fast packet switch architectures for broadband integrated services digital networks. Proceedings of the IEEE, 78(1):133#167, January 1990.

....failures either have to be detected by on line error detection using the actual data, or the system has to test itself, i.e. a built in self test (BIST) is implemented with additional hardware. In the past years MINs have gained significant importance in high performance communication systems [2, 3]. Multistage interconnection networks (MINs) are well suited for being tested efficiently due to their modularity and regularity [4] For locally controlled cube type MINs a variety of test procedures has been presented (e.g. 5, 6, 7] However, no method has been presented so far to generate ....

F. A. Tobagi. Fast packet switch architectures for broadband integrated services digital networks. Proc. IEEE, 78(1):133--167, Jan. 1990.

....solutions for the wide range of present applications and applications envisaged for the future. For instance, a high resolution X ray film may comprise as 5 many as 50 Mbits, and thus may take as long as 13 minutes to be transmitted on a 64kbps channel provided in a narrowband solution [8]. This lead to the search for a solution which will cater to both present and future need of communications. The rapid developments in the area of transmission systems and VLSI has given a new direction in the development of Broadband ISDN, which will provide diverse services from a few bits per ....

F.A.Tobagi. Fast Packet Switch Architectures for Broadband Integrated Services Digital Networks. Proc. IEEE, 78:133--167, 1990. 77

....packets must take to reach the destination. Switching, which takes place at every node on the path, is to switch to place the packets onto the path determined by a prior routing decision. As shown by Figure 1. 2, packet switching at each node (whether it is an Internet Protocol (IP) router [69] or a switch such as an ATM switch [3] in a network includes packet buffering and packet forwarding. In this thesis, we often refer to a device which can perform both tasks as a packet switch or simply a switch. Upon its arrival at an input port, each packet is examined by the switch. From the ....

....forwarding. In this thesis, we often refer to a device which can perform both tasks as a packet switch or simply a switch. Upon its arrival at an input port, each packet is examined by the switch. From the header of a packet, 1 the switch deter1. A packet consists a header and a payload (data) [69]. A B Figure 1.1 An example of a packet switched network. The nodes in the network cloud can be switches or routers. As they arrive at each node, packets sent from host A to host B get switched onto a path which leads them to host B. CHAPTER 1 Introduction 4 mines to which output port the packet ....

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Tobagi, F.A.; "Fast packet switch architectures for broadband integrated services digital networks," Proceedings of the IEEE, Jan. 1990, vol.78, no.1, pp. 133-167. 123

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F. A. Tobagi, "Fast packet switch architectures for broadband integarted services digital networks," in Proc. IEEE, vol. 78, no. 1, Jan. 1990, pp. 133--167.

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Fouad A. Tobagi. Fast packet switch architectures for broadband integrated services digital networks. In Proceedings of the IEEE, volume 78, pages 133--167. IEEE, IEEE, January 1990.

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F. A. Tobagi, "Fast packet switch architectures for broadband integarted services digital networks," in Proc. IEEE, vol. 78, no. 1, Jan. 1990, pp. 133--167.

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F. A. Tobagi, "Fast Packet Switch Architectures for Broadband Integrated Services Digital Networks," Proceedings of the IEEE, Vol. 78, No. 1, pp. 133--167, January 1990.

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F. A. Tobagi, "Fast packet switch architectures for broadband integrated services digital networks," Proc. of the IEEE, vol. 78, January 1990, pp. 133-178.

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F. A. Tobagi, "Fast packet switch architectures for broadband integarted services digital networks," in Proc. IEEE, vol. 78, no. 1, Jan. 1990, pp. 133--167.

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F. A. Tobagi, "Fast packet switch architectures for broadband integrated services digital networks," Proc. of the IEEE, vol. 78, No. 1, pp. 133-167, Jan 1990.

No context found.

F. A. Tobagi, "Fast packet switch architectures for broadband integarted services digital networks," in Proc. IEEE, vol. 78, no. 1, Jan. 1990, pp. 133--167.

No context found.

F. A. Tobagi, "Fast packet switch architectures for broadband integrated services digital networks," Proceedings of IEEE, vol. 78, no. 1, pp. 133-166, Jan. 1990.

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F. A. Tobagi. Fast packet switch architectures for broadband integrated services digital networks. Proceedings of the IEEE, 78(1):133--167, January 1990.

No context found.

F. A. Tobagi, "Fast packet switch architectures for broadband integrated services digital networks," in Proceedings of the IEEE, vol. 78, pp. 133--167, IEEE, IEEE, January 1990.

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F. A. Tobagi, "Fast Packet Switch Architecture for Broadband Integrated Services Digital Networks," Proceedings of IEEE, January 1990, pp. 133-167.

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F.A. Tobagi, "Fast packet switch architectures for broadband integrated services digital networks", Proceedings of the IEEE, vol 78, Nol, January 1990.

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