S. Rajan. Correctness of transformations in high level synthesis. In International Conference on Computer Hardware Description Languages and their Applications, pages 597--603, June 1995.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....Vemuri [51] and Feldbusch and Kumar [18] proposed converting rtl implementation into a normal form where it can be compared with the behavior specification in a straight forward manner. However, transformation into normal form seems to be possible only for restricted classes of designs. Rajan [39] addressed the same question using theorem proving by formalizing both the transformations and their correctness in the PVS theorem prover. Eisnbiegler and Kumar [17] used tight integration of high level synthesis with theorem proving to perform synthesis and verification hand in hand. McFarland ....

Rajan, S.: 1995, "Correctness Transformations in High Level Synthesis: Formal Verification'. Proceedings of the International Conference on Computer Hardware Description Languages.

....etc. see [18] for a survey) The construction of pipelined designs has been discussed intensively in the areas of high level synthesis (e.g. 23] Most of these techniques are based on data flow graph representations of a design. Formally correct transformations of DFG s were investigated in [24]. A formally correct derivation of a non pipelined processor was presented in [4] The systematic, but non mechanized derivation of a pipelined DLX processor is given in [3] The formal verification of pipelined processors was pioneered by [5, 17] Transformational techniques of unpipeling are ....

S.P. Rajan. Correctness of transformations in high level synthesis: formal verification. In Proc. CHDL'95. North-Holland, 1995.

....correct implementation of a design tool based on correctness by construction requires special attention. The use of small local reusable behavior preserving transformations aids correct implementation. The specification of these transformations can be formally verified, for instance by using PVS [OSR93, SOR93, Raj95a, Raj95b, MiR96]. The correctness of the relatively small amount of code required to implement each of these transformations can be assured by extensive testing, code inspection, and through reverse mapping techniques [Jz95] Our current experience with implementing the design tool TRADES indicates that correct ....

....those that seem obviously correct. The importance of the proofs goes beyond the correctness of the transformations. Proving the transformations increases the insight in the usability and restrictions of transformations. PVS has shown to be useful for proving the correctness of transformations [Raj95a, Raj95b, MiR96]. In Section 4.2 it is shown how PVS can be used for transformation verification. 4.1 Design Representation and Behavior SIL graphs are used as design representations. A semantic function maps each graph onto a table representing the external behavior of this graph. The table concept is taken ....

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S.P. Rajan, Correctness of Transformations in High Level Synthesis, Proc. of the IFIP International Conference on CHDL, Chiba, Japan, August 1995.

....ignore the influence of data typing on both correctness at the bit level [Mid94a] and efficiency (Section 5.2, Figure 4) Very few can guarantee correctness because the transformations are not formally verified. That formal verification of transformations is not a luxury has been shown in [Raj95ab] and [MCF93] Furthermore most of these systems employ an automated approach to the application and selection of transformations. To facilitate this they limit the application domain to for instance data path [Jan94] or memory optimization [SFC94] Although such approaches have proven to be ....

S.P. Rajan, Correctness of Transformations in High Level Synthesis, Accepted for the Proc. of the IFIP International Conference on CHDL, Chiba, Japan, August 1995.

....correctness preserving transformations. The transformations are applied by the user during the design process. The transformation based methodology ensures the correctness of the final circuit with respect to its specification. The transformations can also be proved in a separate theorem prover. Rajan 95] also deals with the problems of correctness of transformations. While the T Ruby transformations operates on a system specification and outputs a description suitable for High Level Synthesis, Rajan 95] deals with the formal E l e c t r o n i c S y s t e m s D e s i g n L a b o r a t o r y ....

....to its specification. The transformations can also be proved in a separate theorem prover. Rajan 95] also deals with the problems of correctness of transformations. While the T Ruby transformations operates on a system specification and outputs a description suitable for High Level Synthesis, Rajan 95] deals with the formal E l e c t r o n i c S y s t e m s D e s i g n L a b o r a t o r y 16 correctness of transformations performed in High Level Synthesis. EARLI does not deal directly with the formal correctness of the transformations that is possible to specify. EARLI trust the designer ....

Sreeranga P. Rajan "Correctness of Transformations in High Level Synthesis", In Proc. of CHDL'95, Makahuri Messe, Chiba, Japan.

....the implementation derived from the transformation is a subset of the behaviors permitted by the original specification. In this work, we have attempted to help accomplish the goal of correctness by construction in verifying the correctness of transformations used in dependency graph formalisms [Raj95a] However, we have to note the distinction between the transformations as documented and intended by the informal specification and the transformations actually implemented in software. We explain this distinction in Section 9.1. In Section 9.2, we briefly present our experience in developing a ....

Sreeranga P. Rajan. Correctness of transformations in high level synthesis. In Johnson [Joh95], pages 597--603.

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S. Rajan. Correctness of transformations in high level synthesis. In International Conference on Computer Hardware Description Languages and their Applications, pages 597--603, June 1995.

No context found.

Sreeranga Rajan, "Correctness Transformations in High Level Synthesis: Formal Verification", Proceedings of the International Conference on Computer Hardware Description Languages, Japan, August 1995.

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