W. Nye, D. C. Riley, A. Sangiovanni-Vincentelli and A. L. Tits. DELIGHT-SPICE: An optimization-based system for the design of integrated circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 7, no. 4, pp. 501-519, April 1988.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....mode has been implemented and applied to several high performance microprocessor macros. Numerical results are included. 1. INTRODUCTION AND MOTIVATION In the quest for high performance, much research effort has gone into using optimization methods to solve the transistor sizing problem [2, 1, 10, 12, 4, 3]. It has long been speculated that aggressive optimization of a circuit drives the design into a corner of the process space, causing its yield to suffer. One approach to solve this problem is to model the random and systematic effects that impact yield and use them to estimate and or maximize ....

W. Nye, D.C. Riley, A. Sangiovanni-Vincentelli, and A. L. Tits. DELIGHTSPICE: An optimization-based system for the design of integrated circuits. IEEE Transactions on Computer-Aided Design of lCs and Systems, CAD-7(4):501-519, April 1988.

.... such as a minimax formulation, include the one described in [47] 61] and [63] OAC [78] OPASYN [56] CADICS [54] WATOPT [31] and STAIC [45] The classical methods can be used with more complicated circuit models, including even full SPICE simulations in each iteration, as in DELIGHT.SPICE [75] (which uses the general purpose optimizer DELIGHT [76] and ECSTASY [86] The main advantage of these methods is the wide variety of problems they can handle; the only requirement is that the performance measures, along with one or more derivatives, can be computed. The main disadvantage of the ....

.... There are many approaches to the problem of robustness and yield optimization (see [5] 28] The robust design problem can be formulated as a so called semi infinite programming problem, in which the constraints must hold for all values of some parameter that ranges over an interval, as in [75], which used DELIGHT.SPICE to do robust designs, or more recently, Mukherjee et al. 69] who use ASTRX OBLX. These methods often involve very considerable run times, ranging from minutes to hours. We also formulate the problem as a sampled version of a semi infinite program. The method is ....

W. Nye, D. C. Riley, A. Sangiovanni-Vincentelli, and A. L. Tits, "DELIGHT.SPICE: An optimization-based system for the design of integrated circuits," IEEE Trans. Computer-Aided Design, vol. 7, pp. 501--518, Apr. 1988.

..... Several factors affect the choice of the optimization algorithm, including the design estimation time and the existence of local minima in the solution, In all cases the optimization algorithm is used as a dumb numerical technique which attempts to find an optimal solution. BRAY81, NYE88, DEGR89, CHAN94, GIEL90, JUSU93, HOCE90, KOH89, MAUL93, OCHO94, NING92, SHYU88] The second type of design selection is a knowledge based approach, in which a design method which mimics the steps an expert designer may take is used to find a good design solution. The idea is that the ....

....integer variables will be helpful. If the circuit is being evaluated in an infeasible region, it is difficult to guarantee that derivatives for performance estimates will be reasonable. One solution is to choose an optimization algorithm which does not leave the feasible region [BRAY81,NYE88] and another is to choose an algorithm which is tolerant of these inaccurate derivatives of performance estimates when the estimate itself is clearly infeasible. For this class of DACs, estimation of design performance requires a combination of analyses, at both circuit level and DAC ....

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W. Nye et al, "DELIGHT.SPICE: An Optimization-Based System for the Design of Integrated Circuits," IEEE Trans. on Computer-Aided Design, 7(4), April 1988. [Optimization framework for SPICE, using feasible directions for Constrained optimization.]

....where all performance estimates are computed in one multiple simulation run. Three DC simulations were run to cover worst case bias margins and INL conditions, and two transient simulations were used for settling and glitch energy. Design optimization for analog circuits is not a new topic [4] 7][11], but DSYN s requirements present some unique problems. The optimization process must work well with the circuit estimation method, in which function evaluations are time consuming and function evaluations in the infeasible region may not produce reliable gradients. The mixed integer formulation ....

W. Nye et al, "DELIGHT.SPICE: An Optimization-Based System for the Design of Integrated Circuits," IEEE Trans. on Computer-Aided Design, 7(4), pp. 501-19, April 1988.

....the quality of each proposed circuit solution. Obviously, we would prefer to simulate each circuit fully, but simulation in the loop has usually been deemed too expensive for synthesis. To tune a circuit to find an improved nearby solution, a variety of simulation based techniques exist [9] [10], 11] However, in synthesis we often have no feasible solution at the start of numerical search. Hence, most synthesis approaches trade quality for speed, by substituting some simpler, faster form of circuit evaluation, to allow search of many more solution candidates. In this paper we argue ....

....Optimization Based Approach for Automated Sizing of Analog Cells, Proc. ACM IEEE ICCAD, 1994. 9] K. Saab, D. Marche, N.N. Hamida, B. Kaminska, LIMSoft: automated tool for sensitivity analysis and test vector generation, IEE Proc. Circuits Devices Systems, Vol 143, No. 6, December 1996. [10] W. Nye, et al. DELIGHT.SPICE: an optimization based system for the design of integrated circuits, IEEE Trans. CAD, vol. 7, April 1988. 11] A.R. Conn, R.A. Haud, C. Viswesvariah, C.W. Wu, Circuit optimization via adjoint lagrangians, Proc. ACM IEEE ICCAD, Nov. 1997. 12] M. Krasnicki, R. ....

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W. Nye, et al., "DELIGHT.SPICE: an optimization-based system for the design of integrated circuits," IEEE Trans. CAD, vol. 7, April 1988.

....synthesis run (in contrast, OBLX evaluates 10 4 to 10 5 solutions) and has only been demonstrated attacking problems with a small number of independent design variables. Finally, we also note that there are several circuit optimization attacks that rely on simulator based methods (e.g. [22]) For circuit optimization we assume a good initial circuit solution, and seek to improve it. This can be accomplished with gradient and sensitivity techniques requiring a modest number of circuit evaluations. In contrast, in circuit synthesis we can assume nothing about our starting circuit ....

....optimize, e.g. power or bandwidth; and is a set of constraint functions that codify specifications that must be beyond a specific goal, e.g. gain 60dB) Scalar weights, w i , balance competing objectives. 1) Formulation of the individual objective and constraint functions adapts ideas from [22]. The user is expected to provide a good value, and a bad value for each specification. These are used both to set constraint boundaries and to normalize the specification s range. For example, a single objective is internally normalized as: 2) This normalization process provides a natural way ....

[Article contains additional citation context not shown here]

W. Nye, et al., "DELIGHT.SPICE: an optimization-based system for the design of integrated circuits," IEEE Trans. CAD, vol. 7, April 1988.

....done interactive in a time consuming process. Experts knowledge allows single parameter adjustment towards given goals step by step. This motivates multiple works to study automated design optimization at physical level. Several approaches to automated design optimization in circuit level exist [1, 2, 3]. They differ in their specification of the problem as well as in solving aspects. But all dispense from global optimality to comply computation time constraints for practical use. The problem specification can be done analytically or by using a numeric simulator, e.g. SPICE. In analytical ....

.... determination of the critical path transistor for power reduction by slowing down [3] More general approaches use numerical simulators to retrieve an evaluation and its gradients for specifying a problem of linear programming, gradient descend or non linear optimization with linear constraints [1, 2]. These meth1 ods are for local meliorating, special cases, and some allow multi objective optimization by formulating a minmax problem. The task of general circuit optimization is still incomplete as some characteristics are left beside. First, analog behavior of the circuits becomes more ....

W. Nye, D. C. Riley, A. Sangiovanni-Vincentelli, and A. L. Tits, "DELIGHT.SPICE: An OptimizationBased System for the Design of Integrated Circuits," IEEE Transactions on Computer-Aided Design, vol. 7, no. 4, pp. 501--519, 1988.

....constraints at the system level, moves down to the circuit level, and finally considers the layout level. Recent research on analog synthesis exclusively targets circuit synthesis and layout generation, which are design activities at lower levels of abstraction. Circuit synthesis [14] [19] [20] assumes a known circuit topology, and searches for physical dimensions of transistors, so that circuit level performance attributes, i.e. bandwidth, slew rate, power, are optimized. Layout tools [6] perform cell placement and routing, with respect to physical constraints, i.e. parasitics, ....

....optimization algorithm, i.e. simulated annealing, non linear or geometric programming to find values for the physical design parameters. Finally, the quality of a solution point is evaluated through different simulation methods, i.e. symbolic simulation [14] general purpose simulators (i.e.SPICE) [19], or approximate simulation [20] Research that concentrates on constraint transformation is very limited. 2] suggests a semi analytical approach that uses the circuit transfer function to relate performance attributes to the design parameters and parasitic effects. 16] uses interval analysis ....

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W. Nye, D. Riley, A. Sangiovanni-Vincentelli, A. Tits, "DELIGHT.SPICE: an optimization-based system for the design of integrated circuits", IEEE Transaction on CAD, vol.7, No.4, pp.501-519, April 1988.

.... The specifications for the performance objectives are one sided : upper bounds for performances with w o = 1 (i.e. r o r spec o ) and lower bounds for performances with w o = Gamma1 (i.e. r o r spec o ) Most performance optimization approaches presented in the past [1] [17] are nominal design optimization methods since they consider only nominal values of performances (performance values when the noise parameters are at their mean values) If r 0 denotes the nominal value of a performance r, this optimization problem can be obtained from (11) and (12) by ....

W. Nye, D. C. Riley, A. L. Sangiovanni-Vincentelli, and A. L. Tits, "DELIGHT.SPICE: an optimization-based system for the design of integrated circuits," IEEE Trans. Computer-Aided Design, vol. CAD-7, no. 4, pp. 501-519, April 1988.

....since orthogonal geometries, such as channel width and length in MOS transistors, are generally influenced by independent sources. 2. 3 Canonical Representation of Performance A generalized expression for the computation of sensitivities from a set of arbitrary performances has been derived in [11, 12]. This formulation has been used by us to represent all performances analyzed in a compact and rigorous way, thus ensuring flexibility of our design tools. For completeness the formulation has been reviewed hereafter. Let us consider an arbitrary performance W , let x be a vector of design ....

W. Nye, D. C. Riley, A. Sangiovanni-Vincentelli and A. L. Tits, "DELIGHT-SPICE: An OptimizationBased System for the Design of Integrated Circuits", IEEE Trans. on CAD, vol. 7, n. 4, pp. 501--519, April 1988.

....are subject to variations with respect to their nominal values, let DeltaK(p) K(p) Gamma K(p (0) be the corresponding degradation of K due to such variations. A generalized expression for the computation of sensitivities from a set of arbitrary performance functions has been derived in [35], 36] With this formulation, all performance functions can be represented in a compact and rigorous way, as long as they are continuous and sufficiently regular in an interval around their nominal value, The sensitivity of K i with respect to p j is defined as 1 S i;j = K i (p) p j fi fi ....

W. Nye, D. C. Riley, A. Sangiovanni-Vincentelli and A. L. Tits, "DELIGHT-SPICE: An Optimization-Based System for the Design of Integrated Circuits", IEEE Trans. on CAD, vol. 7, n. 4, pp. 501--519, April 1988.

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W. Nye, D. C. Riley, A. Sangiovanni-Vincentelli and A. L. Tits. DELIGHT-SPICE: An optimization-based system for the design of integrated circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 7, no. 4, pp. 501-519, April 1988.

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W. Nye, D. C. Riley, A. Sangiovanni-Vincentelli and A. L.Tits, "DELIGHT.SPICE: An optimization-based system for the design of integrated circuits," IEEE Transactions on CAD of ICs and Systems, pp. 501-519, volume CAD-7, number 4, April 1986.

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W. Nye, D. C. Riley, A. Sangiovanni-Vincentelli and A. L. Tits, "DELIGHT.SPICE: An optimization-based system for the design of integrated circuits," IEEE Trans. on CAD of ICs and Systems, Vol. CAD-7, No. 4, April 1988, pp. 501-519.

No context found.

W. Nye et al.: "DELIGHT.SPICE: An Optimization-Based System for the Design of Integrated Circuits". IEEE Trans. Computer-Aided Design, Vol. 7, pp. 501-519, April 1988.

No context found.

W. Nye et al, "DELIGHT.SPICE: An Optimization-Based System for the Design of Integrated Circuits," IEEE Trans. CAD, 7(4), April 1988.

No context found.

W.Nye, D.C.Riley, A.L.Sangiovanni--Vincentelli and A.L.Tits. "DELIGHT.SPICE: an optimization--based system for the design of integrated circuits". IEEE Trans. Computer--Aided Design, vol. 7, no. 4, pp. 501--519, Apr. 1988.

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