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G. Bertoni, V. Zaccaria, L. Breveglieri, M. Monchiero, and G. Palermo. AES Power Attack Based on Induced Cache Miss and Countermeasure. International Symposium on Information Technology: Coding and Computing - ITCC 2005.

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Trace-Driven Cache Attacks on AES - Aciçmez, Koç (2006)   (Correct)

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G. Bertoni, V. Zaccaria, L. Breveglieri, M. Monchiero, and G. Palermo. AES Power Attack Based on Induced Cache Miss and Countermeasure. International Symposium on Information Technology: Coding and Computing - ITCC 2005.


Efficient Use of Random Delays - Benoit, Tunstall (2006)   (Correct)

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G. Bertoni, V. Zaccaria, L. Breveglieri, M. Monchiero, and G. Palermo. AES power attack based on induced cache miss and countermeasures. In International Symposium on Information Technology: Coding and Computing --- ITCC 2005.


Partitioned Cache Architecture as a Side-Channel Defence Mechanism - Page (2005)   (1 citation)  (Correct)

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G. Bertoni, V. Zaccaria, L. Breveglieri, M. Monchiero and G. Palermo. AES Power Attack Based on Induced Cache Miss and Countermeasure. In IEEE Conference on Information Technology: Coding and Computing (ITCC), 2005.


Software mitigations to hedge AES against.. - Brickell, Graunke.. (2006)   (1 citation)  (Correct)

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G. Bertoni, V. Zaccaria, L. Breveglieri, M. Monchiero, G. Palermo, "AES Power Attack Based on Induced Cache Miss and Countermeasure" Proc. of International Conference on Information Technology: Coding and Computing (ITCC'05), IEEE Press, pp. 586-591, 2005.

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