N. R. Shanbhag, "A mathematical basis for powerreduction in digital VLSI systems," IEEE Trans. on Circuit and Systems II: Analog and Digital Signal Processing, Vol. 44, No. 11, pp. 935-951, Nov. 1997.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....research into various aspects of low power system design is presently being conducted. We may classify this research into: 1. power reduction techniques [10, 11, 12] 2. low power synthesis techniques [13, 14, 15] 3. power estimation [16, 7] and 4. fundamental limits on power dissipation [17, 18]. While the work presented in this chapter focuses on 3. our eventual objective is to enable 2. Power reduction techniques form an integral part of low power VLSI systems design and is presently an active area of research [10, 11, 12] These techniques have been proposed at all levels of the ....

....5.1 A Generic Communication System consider the bus between two chips as the physical channel and the transmitter and receiver blocks to be a part of the pad circuitry, driving (in case of the transmitting chip) or detecting (in case of the receiving chip) the data signals. Furthermore, unlike in [17], we will assume here that the signal levels are sufficiently high so that the channel can be considered as being noiseless. While this noiseless channel assumption is true for most systems today, this will not be the case for future systems where the signal swings will be reduced to reduce ....

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Transactions on Circuits and Systems, Part II, vol. 44, no. 11, pp. 935--951, November 1997.

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N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Trans. Circuits Syst. II, vol. 44, pp. 935--951, Nov. 1997.

....In this paper, we present a source coding framework for describing low power encoding schemes and then employ the framework to develop new encoding schemes. This paper is a continuation of our effort in developing an informationtheoretic view of very large scale integration (VLSI) computation [9] [16], whereby equivalence between computation and communication is being established. This equivalence has provided lower bounds on power dissipation for digital VLSI systems [9] 16] and has, for the first time, provided a common thread linking various levels of the VLSI design hierarchy. In the ....

....of our effort in developing an informationtheoretic view of very large scale integration (VLSI) computation [9] 16] whereby equivalence between computation and communication is being established. This equivalence has provided lower bounds on power dissipation for digital VLSI systems [9] [16] and has, for the first time, provided a common thread linking various levels of the VLSI design hierarchy. In the framework proposed here, a data source (characterized in a probabilistic manner) is first processed by a decorrelating function . Next, a variant of entropy coding function is ....

[Article contains additional citation context not shown here]

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Trans. Circuits Syst. II, vol. 44, pp. 935--951, Nov. 1997.

....with an encoding scheme for data busses indicate an average reduction in transition activity of 36 . We then examine the transition activity reducing efficiency of these coding schemes. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [5], whereby equivalence between computation and communication is being established. 2. BOUNDS ON TRANSITION ACTIVITY In this section, we present achievable lower and upper bounds on the expected number of transitions. Theorem 1 bounds the number of transitions symbol of a source with a certain ....

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Trans. CAS II, vol. 44, no. 11, pp. 935-951, November 1997.

....and the peak number of transitions. In this paper, we present a source coding framework for describing low power encoding schemes and then employ the framework to develop new encoding schemes. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [9, 17], whereby equivalence between computation and communication is being established. This equivalence has provided lower bounds on power dissipation for digital VLSI systems [9, 17] and has for the first time provided a common thread linking various levels of the VLSI design hierarchy. In the ....

....schemes. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [9, 17] whereby equivalence between computation and communication is being established. This equivalence has provided lower bounds on power dissipation for digital VLSI systems [9, 17] and has for the first time provided a common thread linking various levels of the VLSI design hierarchy. In the framework proposed here, a data source (characterized in a probabilistic manner) is first processed by a decorrelating function f. Next, a variant of entropy coding function f2 is ....

[Article contains additional citation context not shown here]

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Transactions on Circuits and Systems, Part II, vol. 44, no. 11, pp. 935-951, November 1997.

....with an encoding scheme for data busses indicate an average reduction in transition activity of 36 . We then examine the transition activity reducing efficiency of these coding schemes. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [8], whereby equivalence between computation and communication is being established. The concept of entropy from information theory was em ployed in the area of high level power estimation in [6, 7] In [7] entropy was employed as a measure of the average activ ity to be expected in the final ....

N.R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Transactions on Circuits and Systems II, vol. 44, no. 11, pp. 935-951, November 1997.

....time) and ergodic (i.e. the time average and ensemble average are equal) The transition reduction efficiency of existing coding algorithms are compared with the bounds derived in this paper. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [15], whereby equivalence between computa tion and communication is being established. This equiv alence has provided lower bounds on power dissipation for digital VLSI systems [16, 17] and has for the first time pro vided a common thread linking various levels of the VLSI design hierarchy. The ....

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Transactions on Circuits and Systems, Part II, vol. 44, no. 11, pp. 935-951, November 1997.

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N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Trans. Circuits Syst. II, vol. 44, pp. 935-951, Nov. 1997.

....was supported by the NSF CAREER award MIP9623737. lower bounds on energy efficiency that can be achieved. In particular, the lower bounds need to be a function of DSM noise and the complexity of the algorithms being employed. In the past, we have proposed an information theoretic framework [5, 6] that enables us to determine these lower bounds in a rigorous manner. Past work [6] has determined these lower bounds for static circuits. In this paper, we consider dynamic circuit techniques such as domino [7] and noise tolerant domino [3] In particular, we compare the energy efficiency bounds ....

....voltage, load capacitance, circuit style and process parameters. Thus, the information transfer capacity C is a composite function of circuit, process and noise parameters. Information theory [10] indicates that it is possible to achieve reliable operation by coding the input as long as C R. In [5, 6], we showed that the lower bounds on energy efficiency can be obtained by solving the following optimization problem minimize: E b = P tot R , subject to: h(py ) h(#) fc = R, 4) where E b is the energy per information bit and P tot represents the total power dissipation. The solution ....

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Trans. Circuits Syst. II, vol. 44, pp. 935-951, Nov. 1997.

....what is lacking in the latter approach is: 1) the missing link to physical properties of semiconductor technology that permits the derivation of bounds on energy eciency and (2) the inherent assumption of unbounded complexity for optimal systems. In this section, we present our recent work [10, 25, 26] that addresses the rst issue while the second issue is addressed in section 4. 3.1 Information Theoretic Framework Information theory takes a probabilistic model for signals and noise. For example, an information bearing signal source is de ned as one that generates symbols Y from the set S# = ....

....H(Y ) # ### # ### p # log# (p # ) 4) A useful relation quantity is the ####### ######## h(p) de ned as follows: h(p) #plog# (p) # (1 # p)log#(1 # p) 5) where 0 # p # 1. The ####### ####### ######## h ## (q) where 0 # h ## (q) # 0:5 can similarly be de ned. In [26], we have shown that any system function with input X and output Y has a minimum ########### ######## #### Information Transfer Capacity (C) Information Transfer Rate (R) ALGORITHM ARCHITECTURE LOGIC CIRCUITS TECHNOLOGY INFORMATION THEORETIC FRAMEWORK (R C) FOR RELIABILITY (R C) ....

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N. R. Shanbhag, \A mathematical basis for power-reduction in digital VLSI systems", #### ###### ## ######## ### ######## #### ##, vol. 44, no. 11, pp. 935-951, Nov. 1997.

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N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems", IEEE Trans. on Circuits and Systems, Part II, vol. 44, no. 11, pp. 935-951, Nov. 1997.

....styles, making deep submicron (DSM) noise [3] 5] the primary cause of a reliability problem that may ultimately determine the performance achievable in future ASICs. It is very clear that low power design techniques are needed at various levels of design abstraction from process to algorithm [6] [8]. A widely used low power technique is supply voltage scaling which provides linear reduction in This research was supported in part by Intel Corporation, National Science Foundation grant CCR 0000987 and Semiconductor Research Corporation. static power dissipation and quadratic reduction in ....

N. R. Shanbhag, "A mathematical basis for powerreduction in digital VLSI systems," IEEE Trans. Circuits Syst. II, vol. 44, pp. 935-951, Nov. 1997.

....life per unit weight in mobile applications. Research in this area revolves around the development of low power design techniques at various levels of the design hierarchy [6, 7, 8, 9] power estimation techniques [10, 11, 12, 13, 14] and investigating the lower bounds on power dissipation [15, 16, 17, 18]. However, the impact of noise has not been considered so far and in particular the following important questions remain unanswered: 1. What is the lower bound on power dissipation , 2. How far are we from these bounds and 3. How do we approach the lower bounds systematically especially in ....

....on power dissipation , 2. How far are we from these bounds and 3. How do we approach the lower bounds systematically especially in the presence of noise In this paper, we provide answers to some of these questions for simple digital systems. In this paper, in continuation of our past work [18], we present an information theoretic framework (see Fig. 1) for determining lower boundson energy of digital systemswhile ensuring reliable computation. Our main thesis shown in Fig. 1, is that computation needs to be viewed as a process of information transfer over a noisy channel. We develop a ....

[Article contains additional citation context not shown here]

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems", IEEE Trans. on Circuits and Systems, Part II, vol. 44, no. 11, pp. 935-951, Nov. 1997.

No context found.

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems", IEEE Trans. on Circuits and Systems, Part II, Vol.44, No.11, pp.935-951, Nov. 1997

....life per unit weight in mobile applications. Research in this area revolves around the development of low power design techniques at various levels of the design hierarchy [6, 7, 8, 9] power estimation techniques [10, 11, 12, 13, 14] and investigating the lower bounds on power dissipation [15, 16, 17, 18]. However, the impact of noise has not been considered so far and in particular the following important questions remain unanswered: 1. What is the lower bound on power dissipation , 2. How far are we from these bounds and 3. How do we approach the lower bounds systematically especially in ....

....on power dissipation , 2. How far are we from these bounds and 3. How do we approach the lower bounds systematically especially in the presence of noise In this paper, we provide answers to some of these questions for simple digital systems. In this paper, in continuation of our past work [18], we present an information theoretic framework (see Fig. 1) for determining lower bounds on energy of digital systems while ensuring reliable computation. Our main thesis, shown in Fig. 1, is that computation needs to be viewed as a process of information transfer over a noisy channel. We develop ....

[Article contains additional citation context not shown here]

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems", IEEE Trans. on Circuits and Systems, Part II, vol. 44, no. 11, pp. 935-951, Nov. 1997.

....with an encoding scheme for data busses indicate an average reduction in transition activity of 36 . We then examine the transition activity reducing efficiency of these coding schemes. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [8], whereby equivalence between computation and communication is being established. The concept of entropy from information theory was employed in the area of high level power estimation in [6, 7] In [7] entropy was employed as a measure of the average activity to be expected in the final ....

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Transactions on Circuits and Systems II, vol. 44, no. 11, pp. 935--951, November 1997.

....with an encoding scheme for data busses indicate an average reduction in transition activity of 36 . We then examine the transition activity reducing efficiency of these coding schemes. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [5], whereby equivalence between computation and communication is being established. 2. BOUNDS ON TRANSITION ACTIVITY In this section, we present achievable lower and upper bounds on the expected number of transitions. Theorem 1 bounds the number of transitions symbol of a source with a certain ....

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Trans. CAS II, vol. 44, no. 11, pp. 935--951, November 1997.

....time) and ergodic (i.e. the time average and ensemble average are equal) The transition reduction efficiency of existing coding algorithms are compared with the bounds derived in this paper. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [15], whereby equivalence between computation and communication is being established. This equiv 2 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. X, NO. Y, MONTH 1999 alence has provided lower bounds on power dissipation for digital VLSI systems [16, 17] and has for the ....

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Transactions on Circuits and Systems, Part II, vol. 44, no. 11, pp. 935--951, November 1997.

....here is non empirical, applicable to multi bit signals, independent of the coding algorithm, and completely unravels the connection between the bounds on transition activity and entropy. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [5], whereby equivalence between computation and communication is being established. In section II, we present the preliminaries necessary for the development in the rest of the paper. In section III, the main result is presented in the form of Theorem 1. In section IV, we employ Theorem 1 to, 1. ....

N. R. Shanbhag, "A mathematical basis for powerreduction in digital VLSI systems," IEEE Trans. CAS II (to appear).

....and the peak number of transitions. In this paper, we present a source coding framework for describing low power encoding schemes and then employ the framework to develop new encoding schemes. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [9, 17], whereby equivalence between computation and communication is being established. This equivalence has provided lower bounds on power dissipation for digital VLSI systems [9, 17] and has for the first time provided a common thread linking various levels of the VLSI design hierarchy. In the ....

....schemes. This work is a continuation of our effort in developing an information theoretic view of VLSI computation [9, 17] whereby equivalence between computation and communication is being established. This equivalence has provided lower bounds on power dissipation for digital VLSI systems [9, 17] and has for the first time provided a common thread linking various levels of the VLSI design hierarchy. In the framework proposed here, a data source (characterized in a probabilistic manner) is first processed by a decorrelating function f 1 . Next, a variant of entropy coding function f 2 is ....

[Article contains additional citation context not shown here]

N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Transactions on Circuits and Systems, Part II, vol. 44, no. 11, pp. 935--951, November 1997.

No context found.

N. R. Shanbhag, "A mathematical basis for powerreduction in digital VLSI systems," IEEE Trans. on Circuit and Systems II: Analog and Digital Signal Processing, Vol. 44, No. 11, pp. 935-951, Nov. 1997.

No context found.

N. R. Shanbhag, "A mathematical basis for power reduction in digital VLSI systems," IEEE Trans. Circuits Syst. II, vol. 44, pp. 935--951, Nov. 1997.

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