| D.Kolson, A.Nicolau, N.Dutt, "Minimization of memory traffic in high-level synthesis", Proc. 31st ACM/IEEE Design Automation Conf., San Diego, CA, pp.149-154, June 1994. |
....they do not completely eliminate them, and they do not solve the problem of unpredictable data access latency associated with cache memories. Memory optimizations for embedded systems are addressed, among others, by Panda et al.[11] Catthoor et al.[4] and Shiue and Chakrabarti [12] Kolson et al.[9] present a technique for memory access scheduling in high level synthesis. Wang et al.[13] propose a framework for analyzing the flow of values and data reuse for on chip memories. They perform no inter procedural analysis, and assume that the loops are perfectlynested. Panda et al.[10] present an ....
D. J. Kolson, A. Nicolau, and N. Dutt. Minimization of memory traffic in high-level synthesis. In Proc. the 30th Design Automation Conference (DAC, June 1994.
....where the crucial real time aspect is not considered. The fact that memory bandwidth is becoming a problem due to the permanent increase in processing power of todays processors is well known. Some research has been done on generic techniques for reducing the required memory bandwidth (e.g. [24]) but this is usually based on some local optimizations, which have only a limited overall effect. In this paper, the interaction between memory management and performance is investigated thoroughly for memory intensive applications. One of our main aims is to reduce the required off chip ....
D.Kolson, A.Nicolau, N.Dutt, "Minimization of memory traffic in high-level synthesis", Proc. 31st ACM/IEEE Design Automation Conf., San Diego, CA, pp.149-154, June 1994.
....memory intensive behaviors contain a secondary (slower) memory,due to the large data size, which is explicitly represented and accessed in the behavior by arrays. It then becomes crucial to optimize memory access in order to obtain acceptable performance. Redundant memory access elimination (RME) [4, 9, 16] is a technique to remove memory operations (possibly on the critical path) that 3 Research partially supported by NSF grant CCR8704367, ONR grant N0001486K0215and a UCI Faculty Research Grant. access locations previously loaded from and or stored to the memory within and across loop ....
....of program transformations. Redundant Memory access Optimization Techniques which specifically reduce memory accessing by eliminating memory operations are described in [4, 5, 16] In [6] iteration distance relationships between memory operations are formulated for memory analysis. In [9] we present a technique for removing memory operations that are redundant over loop execution. Our technique uses memory anti aliasing theory so as to detect redundancy in a general manner. Tree Height Reduction Tree height reduction was first studied [1, 12] as a method for reducing critical ....
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D. J. Kolson, A. Nicolau, and N. Dutt. Minimization of Memory Traffic in High-Level Synthesis. 31st DAC, June 1994.
....the value argument of a store operation is assumed free after the issuance of the store. For the purpose of dependency analysis on memory operations, each contains a symbolic expression which is a string of symbols that formulates the memory address calculation without the behavior variables [21]. The purpose of the symbolic expression is to be able to efficiently compare memory operations for dependency analysis. In our approach, the variables used in the memory address calculation are normalized to a unique symbol for each loop thereby re formulating the expression in as reduced a ....
D. J. Kolson, A. Nicolau, and N. Dutt. Minimization of Memory Traffic in High-Level Synthesis. Proceedings of the ACM/IEEE Design Automation Conference, pages 149--154, June 1994. San Diego, California.
No context found.
D.Kolson, A.Nicolau, N.Dutt, "Minimization of memory traffic in high-level synthesis", Proc. 31st ACM/IEEE Design Automation Conf., San Diego, CA, pp.149-154, June 1994.
No context found.
D.Kolson, A.Nicolau, N.Dutt, "Minimization of memory traffic in highlevel synthesis", Proc. 31st ACM/IEEE Design Automation Conf., San Diego, CA, pp.149-154, June 1994.
No context found.
Kolson 94a D. J. Kolson, A. Nicolau, and N. Dutt, "Minimization of Memory Traffic in HighLevel Synthesis," Proceedings 31st DAC, pp. 149-154. Kolson 94b D. J. Kolson, A. Nicolau, and N. Dutt, "Integrating Program Transformations in the Memory-Based Synthesis of Image and Video Algorithms," Proceedings of ICCAD94, 1994.
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