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Lai, W. -C. and Cheng, K. T. "Instruction-Level DFT for Testing Processor and IP Cores in System-on-a-Chip," Design Automation Conference, pp , (2001).

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Embedded Test for Processor and Memory Cores in.. - Tehranipour..   (Correct)

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Lai, W. -C. and Cheng, K. T. "Instruction-Level DFT for Testing Processor and IP Cores in System-on-a-Chip," Design Automation Conference, pp , (2001).


Delay Fault Testing of Core-Based Systems-on-a-Chip - Xu, Nicolici (2003)   (Correct)

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W.-C. Lai and K.-T. Cheng. Instruction-level DFT for testing processor and IP cores in system-on-a-chip. In Proc. IEEE/ACM Design Automation Conference (DAC), pages 59 --64, 2001.

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