| D. H. Bailey, E. Barszcz, R. A. Fatoohi, H. D. Simon, and S. Weeratunga. Performance Results on the Intel Touchstone Gamma Prototype. Proceedings of the Fifth Distributed Memory Computing Conference, IEEE, April, 1990, pp. 1236-1245. |
....of the first two Intel Touchstone Gamma prototypes. The system is marketed commercially as the Intel iPSC 860 and will be referred to as the iPSC 860 for the remainder of the paper. For a review of early experiences with the iPSC 860 at Ames Research Center and Oak Ridge National Laboratory, see [1] and [5] respectively. The iPSC 860 system is based on the 64 bit i860 microprocessor by Intel [6] The i860 runs at 40 MHZ (the initial system was delivered with 33 MHZ processors, which were upgraded to 40 MHZ) The theoretical peak speed is 80 MFLOPS for 32 bit floating point and 60 MFLOPS for ....
Bailey, D. H., et al., "Performance Results on the Intel Touchstone Gamma Prototype", Proceedings of the 5th Distributed Memory Computing Conference, April 1990, p. 1236 - 1245.
....a wide range of applications, networks have to support low latency and high bandwidth communication. Reducing latency has traditionally been the biggest challenge. Dedicated multicomputers with special purpose interconnects such as the Intel Touchstone system have latencies below 100 microseconds [4], while latencies between Unix workstations communicating over general networks are typically one order of magnitude higher. The latency between two Sun4 330 running Sun OS 4.1 is for example about 800 microseconds. One reason for the higher latency is the difference in communication medium. The ....
D. H. Bailey, E. Barszcz, R. A. Fatoohi, H. D. Simon, and S. Weeratunga. Performance Results on the Intel Touchstone Gamma Prototype. Proceedings of the Fifth Distributed Memory Computing Conference, IEEE, April, 1990, pp. 1236-1245.
....application program often requires 30 minutes or more, even with no optimization options and no other users on the system. During 1990 the iPSC 860 has been thoroughly investigated at NASA Ames. A first set of benchmark numbers, and some CFD applications performance numbers have been published in [2]. A more recent summary is given by Barszcz in [5] As documented in [5] from an overall systems aspect the main bottleneck has been the SRM, which is not able to handle the demands of a moderately large user community (about 50 to 100 users) in a production environment. Another important result ....
....to three dimensions [18] Their implementation is based on the successful ARC2D and ARC3D codes developed by Pulliam [24] Work by Barszcz and Chawla [6] is in progress to implement F3D, a successor code to ARC3D, on the CM 2. On the iPSC 860 Weeratunga has implemented ARC2D (for early results see [2]) and work is in progress to implement F3D. Weeratunga also has developed a pseudo CFD application based on structured grids for the NAS Parallel Benchmark, which is described in chapter 3 of [4] We will not discuss these efforts here in more detail and refer the interested reader to the ....
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D. Bailey, E. Barszcz, R. Fatoohi, H. Simon, and S. Weeratunga. Performance results on the intel touchstone gamma prototype. In David W. Walker and Quentin F. Stout, editors, Proceedings of the Fifth Distributed Memory Computing Conference, pages 1236 -- 1246, IEEE Computer Society Press, Los Alamitos, California, 1990.
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D. Bailey, E. Barszcz, R. Fatoohi, H. Simon, and S. Weeratunga. Performance results on the Intel Touchstone Gamma Prototype. In David W. Walker and Quentin F. Stout, editors, Proceedings of the Fifth Distributed Memory Computing Conference, pages 1236 -- 1246, Los Alamitos, California, 1990. IEEE Computer Society Press.
No context found.
Bailey, D. H., et al., "Performance Results on the Intel Touchstone Gamma Prototype ", Proceedings of the Fifth Distributed Memory Computing Conference, April 1990, p. 1236 -- 1245.
....communication costs, whereas for an implicit algorithm with higher communication requirements the situation might be reverse. In this work the target machine is a MIMD machine with a moderate number of parallel processors. Specifically we are considering the Intel iPSC 860 with 128 processors [1]. The target application is an explicit two dimensional Euler solver for unstructured meshes, developed by Barth and Jespersen [2, 3] With this application machine combination in mind the partitioning problem can be defined more precisely. The partitioning problem can be considered as a ....
D. Bailey, E. Barszcz, R. Fatoohi, H. Simon, and S. Weeratunga. Performance results on the intel touchstone gamma prototype. In David W. Walker and Quentin F. Stout, editors, Proceedings of the Fifth Distributed Memory Computing Conference, pages 1236 -- 1246, IEEE Computer Society Press, Los Alamitos, California, 1990.
No context found.
D. H. Bailey, E. Barszcz, R. A. Fatoohi, H. D. Simon, and S. Weeratunga. Performance Results on the Intel Touchstone Gamma Prototype. Proceedings of the Fifth Distributed Memory Computing Conference, IEEE, April, 1990, pp. 1236-1245.
No context found.
Bailey, D. H., et. al., "Performance Results on the Intel Touchstone Gamma Prototype," Proceedings of the Fifth Distributed Memory Computing Conference, 1990, pp. 1236-1245.
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