Govindarajan, R.; Nemawarkar, S. S.: SMALL: A Scalable Multithreaded Architecture to Exploit Large Locality Proceedings of the Fourth IEEE Symposium on Parallel and Distributed Processing, Dallas, TX, Dec, 1992.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....( LAU 94] had proposed a technique for multithreaded execution called Interleaving, that could be applied on traditional superscalar processors to allow the execution of monothreaded as well as multithreaded applications, without enlarging the hardware. Otherwise, Govindarajan e Nemawarkar ( GOV 92] designed a multiprocessor called SMALL that was composed by many independent processing units. The major part of multithreaded architectures is based on replication of both instruction paths and storage structures from conventional superscalars in order to support multithreading. Hirata et al. ....

Govindarajan, R.; Nemawarkar, S. S.: SMALL: A Scalable Multithreaded Architecture to Exploit Large Locality Proceedings of the Fourth IEEE Symposium on Parallel and Distributed Processing, Dallas, TX, Dec, 1992.

.... namely code block, threads, and instructions, and use appropriate synchronization and scheduling mechanisms at each level of hierarchy [6] Based on the above design philosophy, in our earlier work, we have proposed the Scalable Multithreaded Architecture to exploit Large Locality (SMALL) [8]. A salient feature of SMALL is maintaining multiple resident activations in the processor which ensures the exploitation of high locality and zero load stalls in accessing the local variables of a function. In this paper, we extend SMALL to exploit both coarse grain parallelism and fine grain ....

....available processors. We compare our work with other multithreaded architectures in Section 6. Concluding remarks are presented in Section 7. 2 The Architecture The execution model of our architecture, which is similar to that proposed in the threaded abstract machine [6] is discussed in [8]. Readers are referred to [8] for details. The architecture consists of a number of Processing Elements (PEs) connected by an interconnection network. For the purpose of this paper we consider the binary n cube network as the topology of the interconnection network. In this section, we describe ....

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R. Govindarajan and S.S. Nemawarkar. Small: A scalable multithreaded architecture to exploit large locality. In Proc. of the 4th IEEE Symp. on Parallel and Distributed Processing, pages 32--39, Dec. 1992.

.... namely code block, threads, and instructions and use appropriate synchronization and scheduling mechanisms at each level of hierarchy [6] Based on the above design philosophy, in our earlier work, we have proposed the Scalable Multithreaded Architecture to exploit Large Locality (SMALL) [8]. The salient features of SMALL are maintaining multiple resident activations in the processor which ensures the exploitation of high locality and zero load stalls in accessing the local variables of a function. In this paper, we extend SMALL to exploit both coarse grain parallelism and fine grain ....

....Finally, we compare our work with other multithreaded architectures in Section 6. Concluding remarks are provided in Section 7. 2 The Architecture The execution model of our architecture, which is similar to that proposed in the threaded abstract machine [6] is discussed in detail in [8]. The architecture consists of a number of Processing Elements (PEs) connected by an interconnection network. For the purpose of this paper we consider the binary n cube network as the topology of the interconnection network. In this section, we describe the organization of a PE (refer to Fig. 1) ....

[Article contains additional citation context not shown here]

R. Govindarajan and S.S. Nemawarkar. Small: A scalable multithreaded architecture to exploit large locality. In Proc. of the 4th IEEE Symp. on Parallel and Distributed Processing, pages 32--39, December 1992.

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