Goossens, G., Bolsens, I., Lin, B., Catthoor, F. Design of heterogeneous ICs for mobile and personal communication systems. ICCAD, 524-531, 1994.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....is a knowledge based planner that constructs a sequence of design synthesis tasks in response to a given set of specifications. The ADAM system concentrates on the design flow of tools (e.g. module selection, allocation) to synthesize an RTL design. Other related work on includes the work of [Goo94] on global design methodologies for heterogeneous ICs and work on flow management [Kle94] In the area of optimization ordering, there have been a number of approaches in the CAD and compilers areas. These, however, only address fixed sets of techniques. The techniques include peephole ....

Goossens, G., Bolsens, I., Lin, B., Catthoor, F. Design of heterogeneous ICs for mobile and personal communication systems. ICCAD, 524-531, 1994.

....of digital circuits in it is emerging in order to cope with the complexity. As mentioned above, camcorder and mobile phone handset have been in the transition from analog systems to digitized systems. The complexity of the mobile terminal chip will be between 0. 5 and 1 million transistors[18]. Industrial design times allowed for this kind of applications are typically less than one year[18] The transistors for digital signal processing in the digitized camcorder is around 0.37 million[14,15] Further more, both are increasingly involving microprocessors and programmable components ....

....camcorder and mobile phone handset have been in the transition from analog systems to digitized systems. The complexity of the mobile terminal chip will be between 0. 5 and 1 million transistors[18] Industrial design times allowed for this kind of applications are typically less than one year[18]. The transistors for digital signal processing in the digitized camcorder is around 0.37 million[14,15] Further more, both are increasingly involving microprocessors and programmable components for digital signal processing accompanied by flexible parameters and changeable algorithms that evolve ....

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Gert Goossens et al. Design of heterogeneous Ics for mobile and personal communication systems. Proceedings of ACM/IEEE International Conference Comp.-Aided Design, 1994, pp. 524-31

....reuse, and offer flexibility to add new features to the system. Advances in processing technology have made it possible to manufacture complex, heterogeneous ASICs that contain an embedded programmable instruction set processor , complemented with application specific data paths and memories [89]. This concept is illustrated in Figure 1. In the case of em85 Published in : P. Marwedel, G. Goossens (ed. Code Generation for Embedded Processors . Copyright by Kluwer Academic Publishers, 1995. 86 Chapter 5 DSP core u Sequencer Accelerator data path Accelerator data path Glue logic ....

G. Goossens, I. Bolsens, B. Lin, F. Catthoor, "Design of heterogeneous ICs for mobile and personal communication systems", Proc. IEEE/ACM Int. Conf. Comp.-Aided Design, San Jose (Calif., U.S.A.), Nov. 1994, pp. 524--531.

....designed add ons. In hardware software co designed ICs, critical parts of a system featuring such a programmable processor are often implemented in hardware. This is done by adding dedicated hardware in the form of custom accelerator data paths, making the design a heterogeneous IC architecture [14]. Code generators, instruction set simulators and assemblers are the key tools that aid the designer when developing the software. However, when the hardware is customised conventional compilers and simulators are deficient, while coding complex applications in assembly language by hand is ....

G. Goossens, I. Bolsens, B. Lin, F. Catthoor, "Design of heterogeneous ICs for mobile and personal communication systems", in Proc. IEEE ICCAD-94, November 94, pp. 524-531

....and optimization techniques have been proposed at all levels of the abstraction in the synthesis process. Power minimization effort across all levels of design abstraction process is surveyed in [14] and in particular system level compilation techniques for power optimization are reviewed in [4]. Power minimization techniques, when programmable platforms are targeted, have been proposed [17] Transformations have been widely used at all levels of abstraction in the synthesis process for optimization of a variety of design and program metrics, such as throughput, latency, area, power, ....

G. Goossens et al., "Design of heterogeneous ICs for mobile and personal communication systems", International Conference on Computer-Aided Design, pp. 524-531, 1994.

....advancement in processing technology has enabled the possibility to integrate the complete system on one chip. The so called heterogeneous ASIC architecturecontains the necessarymemory, accelerator data paths, an embedded programmable processor and the glue logic to put these components together [3]. The DSP core can come in the form of a commercially available DSP processor or ASIP. It is used to implement the low to medium throughput data processing parts and some control functions of the system. The accelerator data paths on the other hand can be used to implement the more time critical ....

G. Goossens, I. Bolsens, B. Lin, F. Catthoor, "Design of heterogeneous ICs for mobile and personal communication systems", Proceedings IEEE International Conference on Computer-Aided Design (ICCAD-94), San Jose (Calif., U.S.A.), November 1994.

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G. Goossens, I. Bolsens, B. Lin, and F. Catthoor. Design of heterogeneous ICs for mobile and personal communication systems. IEEE International Conference on ComputerAided Design, November 1994.

....Heterogeneity of DSP Architectures Notice that Figures 1.a and 2.a represent a functional specification and not an implementation. From characteristic 5, discussed above, and as illustrated in Figures 1.b and 2. b, it follows that the implementation of such a DSP system will also be heterogeneous [14, 19]. This means that it will most likely consist of the communication between components from the 5 classes indicated in Table 1. DSP processor in Table 1 can mean: 1. A commercial programmable DSP processor which, in most high volume products, is a fixed point core tuned to the operations and ....

....specifications. This limits the choices considerably. In addition system design teams seldom design from scratch. Most designs are incremental and a lot of the decision criteria like rough timing estimates are available in the design team. We believe that the key issue here is interactivity [14, 19] based on quick estimates of timing, area and power by using quick sub optimal modes of the component compilers and information stored in component libraries. 3. The most essential step is to generate the necessary software and hardware to make processors, accelerators and the environment ....

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G. Goossens, I. Bolsens, B. Lin, and F. Catthoor. Design of heterogeneous ICs for mobile and personal communication systems. In Proceedings of the IEEE International Conference on Computer-Aided Design, ICCAD 94, pages 524 -- 531. San Jos'e, CA, November 1994.

....systems. Typically, ASIPs will be used as a core processor that can be integrated as a component in an application specific IC. In the sequel, such an ASIP will be referred to as an ASIP core. The ASIP core can be complemented with a number of other modules that are integrated on the same chip [28, 60, 29]. The result is a powerful, mask programmable device, referred to as heterogeneous IC or soft chip. By virtue 2 Such a mixed signal chip would implement all signal processing and control functions, excluding power amplifier circuits. To be published in : G. De Micheli and M.G. Sami, ....

G. Goossens, I. Bolsens, B. Lin, and F. Catthoor. Design of heterogeneous ICs for mobile and personal communication systems. In Proc. IEEE Intl. Conf. Comp.- Aided Design, pp. 524--531, San Jose, Nov. 1994.

.... composed of programmable devices, hardware accelerators and memory, are well suited for the implementation of embedded systems, since they combine the flexibility and the low cost of programmable devices with the efficiency of hardware accelerators for performing critical functionalities [89, 90]. Because of this heterogeneous implementation style, a comprehen y Currently with SGS Thomson Microelectronics, Crolles, France. Published in : P. Marwedel, G. Goossens (ed. Code Generation for Embedded Processors . Copyright by Kluwer Academic Publishers, 1995. Software synthesis for ....

G. Goossens, I. Bolsens, B. Lin, F. Catthoor, "Design of heterogeneous ICs for mobile and personal communication systems", Proc. IEEE/ACM Int. Conf. Comp.-Aided Design, San Jose (Calif., U.S.A.), Nov. 1994, pp. 524--531.

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G. Goossens, I. Bolsens, B. Lin, and F. Catthoor. Design of heterogeneous ICs for mobile and personal communication systems. IEEE International Conference on Computer-Aided Design, November 1994.

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