M. Gschwind, V. Salapura, and D. Maurer. FPGA prototyping of a RISC processor core for embedded applications. IEEE Trans. on Very Large Scale Integration (VLSI) Systems, 9(2):241--250, April 2001. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Instruction Set Selection for ASIP Design - Gschwind (1999) (16 citations) Self-citation (Gschwind) (Correct)
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GSCHWIND,M.,SALAPURA,V.,AND MAURER, D. FPGA prototyping of a RISC processor core for embedded applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (1998). submitted.
Instruction Set Selection for ASIP Design - Gschwind (1999) (16 citations) Self-citation (Gschwind) (Correct)
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GSCHWIND,M.,SALAPURA,V.,AND MAURER, D. FPGA prototyping of a RISC processor core for embedded applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (1998). submitted.
Extracting and Improving Microarchitecture.. - Padmanabhan.. (2004) (Correct)
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M. Gschwind, V. Salapura, and D. Maurer. FPGA prototyping of a RISC processor core for embedded applications. IEEE Trans. on Very Large Scale Integration (VLSI) Systems, 9(2):241--250, April 2001.
Extracting and Improving Microarchitecture.. - Padmanabhan.. (2004) (Correct)
No context found.
M. Gschwind, V. Salapura, and D. Maurer. FPGA prototyping of a RISC processor core for embedded applications. IEEE Trans. on Very Large Scale Integration (VLSI) Systems, 9(2):241--250, April 2001.
Extracting and Improving Microarchitecture Performance on.. - Padmanabhan, al. (2005) (Correct)
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M. Gschwind, V. Salapura, and D. Maurer, FPGA Prototyping of a RISC Processor Core for Embedded Applications, IEEE Trans. on Very Large Scale Integration (VLSI) Systems, 9(2):241--250, (April 2001).
An SoC Design Methodology Using FPGAs and Embedded.. - Ohba, Takano (2004) (Correct)
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Gschwind, M., Salapura, V. and Maurer, D.: "FPGA prototyping of a RISC processor core for embedded applications," IEEE Transactions on Very Large Scale Integration (VLSI) Systems , Volume: 9 Issue: 2, pp. 241-250, April 2001.
In-System FPGA Prototyping of an Itanium Microarchitecture - Wunderlich, Hoe (2004) (Correct)
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M. Gschwind, V. Salapura, and D. Maurer, "FPGA Prototyping of A RISC Processor Core for Embedded Applications, " IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 9, no. 2, Apr. 2001.
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