M. A. Blumrich, R. D. Albert, Y. Chen, D. W. Clark, S. N. Damianakis, C. Dubnicki, E. W. Felten, L. Iftode, K. Li, M. Martonosi, and R. A. Shillner. Design choices in the SHRIMP system: An empirical study. In Proc. of the 25th Annual Int'l Symp. on Computer Architecture (ISCA'98), 1998.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....of a TLB directly on the interface [28] have proven useful in maximizing remotely addressible user memory. These approaches are important in that they do not require the programmer to be directly involved in managing DMA enabled user memory. SHRIMP s Virtual Memory Mapped Communication system [8] allowed users to 50 100 150 200 0 20 40 60 80 100 120 (MB s) Message Size (Kbytes) Firehose Rendezvous (no unpin) 0 Figure 5: Peak Bandwith for Rendezvous and Firehose export pinned pages to remote nodes which then mapped them into the page table, and provided hardware support for ....

M. A. Blumrich, R. D. Albert, Y. Chen, D. W. Clark, S. N. Damianakis, C. Dubnicki, E. W. Felten, L. Iftode, K. Li, M. Martonosi, and R. A. Shillner. Design choices in the SHRIMP system: An empirical study. In Proc. of the 25th Annual Int'l Symp. on Computer Architecture (ISCA'98), 1998.

....one requiring special network interface support and the other requiring no special network interface support. To evaluate these protocols and investigate the design tradeo s of the network interface hardware, we implemented two fault tolerant PC clusters, one using SHRIMP network interfaces [14, 13] and the other using Myrinet [3, 9, 7] network interfaces. Both systems support virtual memory mapped communication. Our results with three transactionbased applications show that VMMC is a convenient and ef cient communication mechanism to support fast failover on clusters. With no special ....

....the sender to explicitly initiate a data transfer by specifying a local virtual address, a remote virtual address (proxy) and a transfer size. The data is delivered directly from the sender s to the receiver s virtual address space without memory copying. Using a custom network interface (SHRIMP [14, 13]) VMMC also supports automatic update data transfers. This type of data transfer propagates updates automatically to the corresponding imported receive bu er. To use automatic update, a portion of local virtual memory is bound to an imported receive bu er such that all writes to the bound memory ....

[Article contains additional citation context not shown here]

M. Blumrich et.al. Design Choices in the SHRIMP System: An Empirical Study. In ISCA'98.

....3 4 Figure 4: Performance of the spectral analysis code on up to four nodes left: speed up and eciency values right: parallelization overhead 6 nisms provided by the SCI VM. 6 Related work Work related to the approach discussed in this work represented by cluster DSM projects like SHRIMP [1, 10] and Cashmere [14] Like the SCI VM discussed in this work, both projects deploy hardware mechanisms to create a hybrid software hardware solution for DSM. In SHRIMP a custom designed network adapter with an automatic global update functionality is used, while Cashmere utilizes DEC s memory ....

M. Blumrich, R. Alpert, Y. Chen, D. Clark, S. Damianakis, C. Dubnicki, E. Felten, L. Iftode, K. Li, M. Martonosi, and R. Shillner. Design Choices in the SHRIMP System: An Empirical Study. In Proceedings of the 25th International Symposium on Computer Architecture ISCA-25, Barcelona, Spain, May 1998.

.... without hardware support and operating system modification and specific for software DSM system has never been started, although there are many research groups endeavouring to design user level communication for general distributed system, such as U Net[24] FM[25] SHRIMP in Princeton [26] is claimed to support software DSM system, however, it requires modify the both network interface and operating system. However, we find an important fact in our test. Communication software overhead (T commsof t ) does not occupy significant part of the whole communication time as presented in ....

M. A. Blumrich, R. D. Albert, Y. Chen, D. W. Clark, S. N. Damianakis, C. Dubnicki, E. W. Felten, L. Iftode, K. Li, M. Martonosi, and R. A. Shillner. Design choices in the shrimp system: An empirical study. In Proc. of the 25th Annual Int'l Symp. on Computer Architecture (ISCA'98), June 1998.

....Bench mark, in transactions per second) pointing and rollback, while our work focuses exclusively on transaction processing. They do, however, use the Vista transaction processing system as an example application of their system. Their reported results were measured on a Shrimp network [6] connecting 66Mhz Pentiums. They came to the conclusion that transparent write through, with some optimizations, leads to acceptable performance in their environment. By virtue of doing solely transaction processing, our straightforward Vista implementation (Version 0) implements essentially the ....

M. Blumrich et al. Design choices in the SHRIMP system: An empirical study. In Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998.

....variety of programs than FLASH: both sharedmemory programs running via SVM and also message passing programs. Our SVM system implements an HLRC protocol on a Myrinetbased PC cluster. The same HLRC protocol was previously implemented on Intel Paragon [24] Wisconsin Typhoon Zero [10] and SHRIMP [5] (a PC based cluster interconnected with a custom designed network interface) The HLRC implementation on Typhoon zero used active messages for communication support. Our HLRC implementation uses the VMMC 2 library [9] and in this sense is similar to the HLRC implementation on SHRIMP [11] which ....

M. A. Blumrich, R. D. Alpert, Y. Chen, et al. Design choices in the SHRIMP system: An empirical study. In Proc. of the 25th Annual Symposium on Computer Architecture, June 1998.

....200MHz Intel Pentium Pro processors and SCI shared memory interconnects, while the fast PCs Cluster has single 400MHz Intel Pentium Pro processor per node and features fast communication with fully switched Gigabit s Myrinet Interconnects. Comparable Clusters of PCs installations are described in [4, 6, 20]. 6.1 Extraction of Model Parameters for Alternatives The parameters of our analytical model were intentionally chosen to include all major technical data usually published for parallel machines. This includes among others: message overhead, message throughput, computation rate for SAXPY inner ....

M. Blumrich, R. D. Alpert, Y. Chen, D. Clark, S. Damianakis, C. Dubnicki, E. W. Felten, L. Iftode, M. Martonosi, and R. A. . Shillener. Design choices in the SHRIMP system: An empirical study. In Proc. 25th Intl. Symp. on Computer Architecture, pages 330--341. ACM, June 1998.

....by an improved SCI shared memory interconnect technology. Finally the fast PCs Cluster features single 400MHz Intel Pentium Pro PCs as nodes, connected by a Gigabit s communication system based on fully switched Myrinet interconnects. Comparable Clusters of PCs installations are described in [5, 6, 16]. 4.1 Extraction of model parameters for alternatives As shown in Section 2.2, the parameters of our analytic model have been intentionally chosen in a way to include all major technical data usually published for parallel machines. This includes among others: message overhead, message ....

M. Blumrich, R. D. Alpert, Y. Chen, D. Clark, S. Damianakis, C. Dubnicki, E. W. Felten, L. Iftode, M. Martonosi, and R. A. . Shillener. Design choices in the SHRIMP system: An empirical study. In Proc. 25th Intl. Symp. on Computer Architecture, pages 330--341. ACM, June 1998.

.... and communication architecture) most of the e#orts so far have been in the lower two: relaxed consistency models and protocol implementations to reduce communication frequency and tra#c [4, 21, 47, 2] and additional hardware support in the communication architecture to reduce communication costs [39, 11, 35, 19, 18, 7, 30, 29]. With the relative maturity of protocols, in the last couple of years SVM research has moved to greater emphasis on the application layer and the synergies available across layers. New areas are being emphasized like application driven performance evaluation, application restructuring for SVM ....

....4. 2 Fine grain Remote Writes Several papers have suggested hardware support for fine grain remote operations in the network interface [11, 35, 30, 29] Recent real implementations include the AURC home based protocol on the SHRIMP multicomputer, which uses the automatic update hardware mechanism [7] to snoop writes o# the memory bus and propagate them to the home of the page if it is remote. This eliminates di#s, but can generate more tra#c on the memory bus and network and relies on the ability to map pages write through in the caches. The fine grain remote writes can be used not only for ....

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M.A. Blumrich, R.D. Alpert, A. Bilas, Y. Chen, D.W. Clark, S. Damianakis, C. Dubnicki, E.W. Felten, L. Iftode, K. Li, M. Martonosi, and R.A. Shillner. Design choices in the shrimp system: An empirical study. In Proceedings of the 25th Annual Symposium on Computer Architecture, June 1998.

....space. Writes to this memory are propagated to remote network interface memory. It is the application s responsibility to move data from a send buffer to the sender s network interface memory and move data from the receiver s network interface memory into a receive buffer. The SHRIMP approach [2, 3, 4] implements protected user level communication using the Virtual Memory Mapped Communication (VMMC) model. This approach allows an application to send data directly from its virtual memory to a remote process virtual memory in a multiprogramming environment. This approach requires receivers to ....

Matthias A. Blumrich, Richard D. Alpert, Yuqun Chen, Douglas W. Clark, Stefanos N. Damianakis, Cezary Dubnicki, Edward W. Felten, Liviu Iftode, Kai Li, Margaret Martonosi, and Robert A. Shillner. Design choices in the shrimp system: An empirical study. In Proceedings of the 25th Annual Symposium on Computer Architecture, June 1998.

....similarly. In our experiments, we did not see contention in the AURC case, though it requires all shared, non home pages to use a write through caching strategy, while the HLRC protocol can employ a write back caching strategy for all pages. 2 The SHRIMP System The SHRIMP multicomputer system [6] consists of 16 Pentium PC nodes connected by an Intel Paragon routing network [27, 17] Each PC uses an Intel Pentium Xpress motherboard [18] that holds a 66 MHz Pentium CPU, 256 Kbytes of L2 cache, and 40 Mbytes of DRAM memory. Peripherals are connected to the system through the EISA expansion ....

M.A. Blumrich, R.D. Alpert, A. Bilas, Y. Chen, D.W. Clark, S. Damianakis, C. Dubnicki, E.W. Felten, L. Iftode, K. Li, M. Martonosi, and R.A. Shillner. Design Choices in the SHRIMP System: An Empirical Study. In Proceedings of the 25th Annual Symposium on Computer Architecture, June 1998.

....space. Writes to this memory are propagated to remote network interface memory. It is the application s responsibility to move data from a send bu#er to the sender s network interface memory and move data from the receiver s network interface memory into a receive bu#er. The SHRIMP approach [2, 3, 4] implements protected user level communication using the Virtual MemoryMapped Communication (VMMC) model. This approach allows an application to send data directly from its virtual memory to a remote process virtual memory in a multiprogramming environment. This approach requires receivers to pin ....

Matthias A. Blumrich, Richard D. Alpert, Yuqun Chen, Douglas W. Clark, Stefanos N. Damianakis, Cezary Dubnicki, Edward W. Felten, Liviu Iftode, Kai Li, Margaret Martonosi, and Robert A. Shillner. Design choices in the shrimp system: An empirical study. In Proceedings of the 25th Annual Symposium on Computer Architecture, June 1998.

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M.A. Blumrich, R.D. Alpert, A. Bilas, Y. Chen, D.W. Clark, S. Damianakis, C. Dubnicki, E.W. Felten, L. Iftode, K. Li, M. Martonosi, and R.A. Shillner. Design Choices in the SHRIMP System: An Empirical Study. In Proceedings of the 25th Annual Symposium on Computer Architecture, June 1998.

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M. A. Blumrich, R. D. Albert, Y. Chen, D. W. Clark, S. N. Damianakis, C. Dubnicki, E. W. Felten, L. Iftode, K. Li, M. Martonosi, and R. A. Shillner. Design choices in the SHRIMP system: An empirical study. In Proc. of the 25th Annual Int'l Symp. on Computer Architecture (ISCA'98), 1998.

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M. A. Blumrich, R. D. Alpert, Y. Chen, D. W. Clark, S. N. Damianakis, C. Dubnicki, E. W. Felten, L. Iftode, K. Li, M. Martonosi, and R. A. Shillner. Design Choices in the SHRIMP System: An Empirical Study. In Proceedings of the 25th Annual ACM/IEEE International Symposium on Computer Architecture (ISCA), pages 330-- 341, Barcelona, Spain, June 1998.

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M. A. Blumrich, R. D. Albert, Y. Chen, D. W. Clark, S. N. Damianakis, C. Dubnicki, E. W. Felten, L. Iftode, K. Li, M. Martonosi, and R. A. Shillner. Design choices in the SHRIMP system: An empirical study. In Proc. of the 25th Annual Int'l Symp. on Computer Architecture (ISCA'98), June 1998. 151

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M.A. Blumrich et al., "Design Choices in the SHRIMP System: An Empirical Study," Proc. Int'l Symp. Computer Architecture, IEEE CS Press, Los Alamitos, Calif., 1998, pp. 330-341.

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