T. A. Proebsting and C. N. Fischer. Linear-time, optimal code scheduling for delayed-load architectures. In Proceedings of the Conference on Programming Language Design and Implementation, pages 256--267, Toronto, Ontario, Canada, June 1991.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....execution latencies of each operation (instruction) in the DDG and the availability of function unit resources. This is in contrast to the MRIS problem, where only the true dependence constraints are observed. The MRIS problem is also closely related to the optimal code generation (OCG) problem [1, 34, 33]. An important difference between traditional code generation methods and our MRIS problem is that the former emphasizes reducing the code length (or schedule length) for a fixed number of registers, while the latter minimizes the number of registers. The unified resource allocator (URSA) method ....

T. A. Proebsting and C. N. Fischer. Linear-time, optimal code scheduling for delayed-load architectures. In Proc. of the ACM SIGPLAN '91 Conf. on Programming Language Design and Implementation, pages 256--2671, Toronto, Canada, June 1991.

....the execution latencies of each operation (instruction) in the DDG and the availability of function unit resources. This is in contrast to the MRIS problem, where only the true dependence constraints are observed. The MRIS problem is closely related to the optimal code generation (OCG) problem [1, 24, 23]. An important difference between traditional code generation methods and our MRIS problem is that the former emphasizes reducing the code length (or schedule length) for a fixed number of registers, while the latter minimizes the number of registers. The unified resource allocator (URSA) method ....

T.A. Proebsting and C.N. Fischer Linear-time, optimal code scheduling for delayed-load architectures. In Proc. of the ACM SIGPLAN '91 Conf. on Programming Language Design and Implementation, pages 256--2671, Toronto, Canada, June 1991.

....designed a linear, almost optimal algorithm for scheduling expression trees with no spilling when one load and one arithmetic operations can be performed in parallel. Their algorithm couples a simple compaction technique to the dynamic programming scheme of Aho and Johnson. Proebsting and Fisher [PF91] provide an optimum algorithm to schedule an expression tree on a processor with a two stages pipelined load unit. Recently, Palem and Simons [PS93] proved that code scheduling on one two stage pipelined processor and one register is NP complete for simple expression trees. First attempts to ....

T.A. Proebsting and C.N. Fisher. Linear-time, optimal code scheduling for delayedload architectures. In Proceedings of the ACM SIGPLAN' 91 Conference on Programming Language Design and Implementation, pages 256--267, Toronto, June 1991.

....heuristics for pipelined architectures [6, 2 13, 15, 37] These methods attack the problem of scheduling expressions represented by directed acyclic graphs (DAGs) for architectures with pipeline constraints, rather than memory latency constraints. The algorithm proposed by Proebsting and Fischer [29] addresses the scheduling of instructions for delayedload architectures with a fixed number of delay slots. Their algorithm does not handle cases beyond basic blocks and does not apply to speculative loads. Most static, global scheduling techniques have been limited by the unsafeness of executing ....

T. A. Proebsting and C. N. Fischer. Linear-time, optimal code scheduling for delayed-load architectures. In ACM SIGPLAN '91 Conference on Programming Language Design and Implementation, pages 256--267, June 1991.

....the execution latencies of each operation (instruction) in the DDG and the availability of function unit resources. This is in contrast to the MRIS problem, where only the true dependence constraints are observed. 15 The MRIS problem is closely related to the optimal code generation (OCG) problem [2, 22, 21]. For the case in which the dependence graph is a tree, an optimal algorithm to solve the OCG problem exists. For a general DAG, the problem is known to be NP Complete since 1975 [22] An important difference between traditional code generation methods and our MRIS problem is that the former ....

T.A. Proebsting and C.N. Fischer Linear-time, optimal code scheduling for delayed-load architectures. In Proc. of the ACM SIGPLAN '91 Conf. on Programming Language Design and Implementation, pages 256--2671, Toronto, Canada, June 1991. 18

....remarkable speedup can be obtained from scheduling improvements rather than from better register usage. In the presence of delayed instructions or multiple functional units, the register requirements are either completely ignored for scheduling (e.g. 17] or the DAG is assumed to be a tree [18, 19, 20], or heuristic techniques are applied [18, 21, 22, 23, 24] In the presence of a loop, the completion time of a schedule may be improved by suitably overlapping subsequent iterations: Software pipelining (e.g. 25, 26, 27] transforms a loop such that independent instructions from several ....

Todd A. Proebsting and Charles N. Fischer. Linear--time, optimal code scheduling for delayed--load architectures. In Proc. ACM SIGPLAN Programming Language Design and Implementation, pages 256--267, June 1991.

....heuristics for removing edges from that interference graph to avoid excessive spilling, but does not give results. In contrast, dependence conscious colouring uses a minimal interference graph to minimize spilling and preserves scheduling freedom through its register selection heuristics. PF91] gives an optimal algorithm. Unfortunately it solves a very limited and unrealistic problem: scheduling and stupid register allocation for binary expression trees with single delay slot loads at the leaves. i.e. no unary operators, no constants or register variables, no common subexpression ....

Todd A. Proebsting and Charles N. Fischer. Linear-time, optimal code scheduling for delayed-load architectures. In SIGPLAN '91 [SIG91], pages 256--267.

....that remarkable speedup can be obtained from scheduling improvements rather than from better register usage. In the presence of delayed instructions or multiple functional units, the register requirements are either completely ignored for scheduling (e.g. 3] or the DAG is assumed to be a tree [5, 26, 30], or heuristic techniques are applied [5, 6, 15, 17] In the presence of a loop, the quality of instruction scheduling may be improved by suitably overlapping subsequent iterations: Software pipelining (e.g. 12, 24, 25] transforms a loop such that independent instructions from several ....

Proebsting, T.A., Fischer, C.N.: Linear-Time, Optimal Code Scheduling for Delayed-Load Architectures, Proc. ACM PLDI'91 Conf. Progr. Lang. Design and Impl., pp. 256--67, 1991

....and heuristics for pipelined architectures [5, 11, 12, 27] These methods attack the problem of scheduling expressions represented by directed acyclic graphs (DAGs) for architectures with pipeline constraints, rather than memory latency constraints. The algorithm proposed by Proebsting and Fischer [22] addresses the scheduling of instructions for delayed load architectures with a fixed number of delay slots. Their algorithm does not handle cases beyond a basic block and does not apply to speculative loads. Most static, global scheduling techniques have been limited by the unsafeness of ....

T. A. Proebsting and C. N. Fischer. Linear-time, optimal code scheduling for delayed-load architectures. In ACM SIGPLAN '91 Conference on Programming Language Design and Implementation, pages 256--267, June 1991.

.... approaches deal with register allocation [Cha82, BCKT89, CH90, San90, Project Description 7 CK91] some with instruction scheduling [GM86, GR90, War90, BR91] and some try to perform register allocation and instruction scheduling simultaneously or try to integrate it best [Kar84, Mor91, BEH91, PF91, BHE91] Two approaches were found where the machine was described with parameters or with a model language [BEH91, BR91] 2.1 Register allocation Concerning register allocation, in all of the approaches, heuristics are applied, because otherwise the problem would be intractable. One basic ....

....storage, but which have intersecting live ranges) resolution. This approach is close to our approach in that it considers profiling information. It does not, however, deal with architectural constraints, and only allows the profiling information to be used in one heuristic. Proebsting and Fischer [PF91] introduce an algorithm which optimizes register allocation as well as instruction scheduling for pipeline architectures with load delays of one; for higher delays, the algorithm serves as a good heuristic. For trees, the algorithm runs in time linear in the number of nodes in the expression ....

Todd A. Proebsting and Charles N. Fischer. Linear-time, optimal code scheduling for delayed-load architectures. In PLDI [PLD91], pages 256--267.

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T. A. Proebsting and C. N. Fischer. Linear-time, optimal code scheduling for delayed-load architectures. In Proceedings of the Conference on Programming Language Design and Implementation, pages 256--267, Toronto, Ontario, Canada, June 1991.

No context found.

Todd A. Proebsting and Charles N. Fischer. Linear-time, optimal code scheduling for delayed-load architectures. In Proceedings of the ACM SIGPLAN '91 Conference on Programming Language Design and Implementation, pages 256--267, Toronto, Ontario, June 26--28, 1991. SIGPLAN Notices, 26(6), June 1991.

No context found.

Todd A. Proebsting and Charles N. Fischer, \Linerar-time, Optimal Code Scheduling for Delayed-Load Architectures", Proceedings of the ACM SIGPLAN '91 PLID, Toronto, Canada, Jun. 1991.

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