Rajwar, R. and Goodman, J. R., "Speculative lock elison: Enabling highly concurrent multithreaded execution," 34th International Symposium on Microarchitecture, pp. 294--305, December 2001. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
The System-on-a-Chip Lock Cache - Akgul (2004) (Correct)
No context found.
Rajwar, R. and Goodman, J. R., "Speculative lock elison: Enabling highly concurrent multithreaded execution," 34th International Symposium on Microarchitecture, pp. 294--305, December 2001.
PARLAK: Parametrized Lock Cache Synthesizer - Akgul, Mooney (2002) (Correct)
No context found.
R. Rajwar and J. R. Goodman, "Speculative lock elison: Enabling highly concurrent multithreaded execution," in 34th International Symposium on Microarchitecture, December 2001.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC