D. A. Huffman, "The synthesis of sequential switching circuits," J. Franklin Inst., part I, vol. 257, no. 3, pp. 161--190, Mar. 1954.  Home/Search   Document Not in Database   Summary   Related Articles   Check

.... Introduction During the last decade, there has been significant progress in developing methods and tools for asynchronous circuit synthesis [1] 2] 3] 4] 5] The two chief directions in this work have been following two synthesis approaches, one based on the Huffman s state machine model [6], 7] and the other deriving from Muller s concept of speed independent circuit [8] The former, also known as fundamental mode circuit design, makes strong assumptions about the delay of the environment compared to that of the circuit. It requires the environment to be slow enough in applying the ....

....are only applicable under the following ffl 8e i ; e j 2 E ; e i k e j , ffl 9e 2 E : e ; a Informally, the simultaneity conditions only hold when the events in E are concurrent and at least one of them triggers a. Multiple Input Change in fundamental mode as defined by Huffman [6] required inputs to change simultaneously , i.e. within a small time window ffi. However, this was not really exploited for optimization, and it did not result in a clean design methodology. The new LzTS A ffl Let C = e i 2E 0 ER(e i ) fsj9 s e j s : e j 2 e.g. js 2 ....

D. A. Huffman, "The synthesis of sequential switching circuits," J. Franklin Institute, vol. 257, pp. 161--190,275--303, Mar. 1954.

....I. INTRODUCTION D URING the last decade, there has been significant progress in developing methods and tools for asynchronous circuit synthesis [1] 5] The two chief directions in this work have been the following two synthesis approaches, one based on the Huffman s state machine model [6], 7] and the other deriving from Muller s concept of speed independent circuit [8] The former, also known as fundamental mode circuit design, makes strong assumptions about the delay of the environment compared to that of the circuit. It requires the environment to be slow enough in applying the ....

....signals. B. Simultaneity Assumptions Simultaneity among a set of events is another kind of timing assumption that has not been exploited explicitly in previous work. 3 It is relative notion which is defined on a set of events 3 Multiple input change in fundamental mode, as defined by Huffman [6], required inputs to change simultaneously, i.e. within a small time window ffi . However, this was not really exploited for optimization, and it did not result in a clean design methodology. with respect to a reference event , triggered by some of the events in . From the point of view of , ....

D. A. Huffman, "The synthesis of sequential switching circuits," J. Franklin Inst., vol. 257, pp. 161--190, Mar. 1954.

....Figure 1.1 shows the design ow for our timed circuit design tool ATACS. In ATACS, the design of timed circuits begins with a speci cation of circuit behavior in a hardware description language including VHDL, timed handshaking expansions (THSE) 63, 86] asynchronous nite state machines (AFSM) [42, 32, 84], and signal transition graphs (STG) 28] These speci cation methods are able to describe sequencing, concurrency, and choice. Moreover, they support bounded timing information which is used to optimize the circuit implementations during various design stages. The timing parameters can come from ....

....often specify circuit behavior in a lower level. It can often produce very ecient and fast circuits since timing information can be used to optimize the implementations. Graph based methods include Petri Nets or STGs [28] I nets [57] change diagrams [81] asynchronous nite state machines [42, 32, 84], and state graphs [60] These methods often require complete state space exploration to nd all reachable states in a design. Therefore, the state space explodes quickly as the complexity and size of the designs grow. Since speci cations in these approaches are at the signal transition level, ....

Huffman, D. A. The synthesis of sequential switching circuits. J. Franklin Institute (March, April 1954).

....the circuit s outputs. Bounded delays of gates and wires in the circuit are used to determine an upper bound on the period the environment must wait for the circuit to stabilize. The literature contains a large volume of work on fundamental mode circuits, starting from Huffman, Unger and McCluskey [44, 45, 89, 70, 27, 83, 82, 99]. Timed circuits [79] are another class of practical asynchronous circuits that make use of bounded delay assumptions within the circuit and in the environment. This can lead to significant improvement in circuit complexity and performance compared to DI, SI or QDI circuits [78] However, as with ....

D. A. Huffman. The synthesis of sequential switching circuits. Journal of the Franklin Institute, (4):275--303, April 1954.

....the circuit s outputs. Bounded delays of gates and wires in the circuit are used to determine an upper bound on the period the environment must wait for the circuit to stabilize. The literature contains a large volume of work on fundamental mode circuits, starting from Huffman, Unger and McCluskey [44, 45, 89, 70, 27, 83, 82, 99]. Timed circuits [79] are another class of practical asynchronous circuits that make use of bounded delay assumptions within the circuit and in the environment. This can lead to significant improvement in circuit complexity and performance compared to DI, SI or QDI circuits [78] However, as with ....

D. A. Huffman. The synthesis of sequential switching circuits. Journal of the Franklin Institute, (3):161--190, March 1954.

....this definition of a sequential circuit, almost all asynchronous circuit styles fall into this category. However, the term asynchronous sequential circuits or machines generally refers to those asynchronous circuits based on finite state machines similar to those in synchronous sequential circuits [14, 23]. Muller was the first to give a rigorous formalization of a special type of circuits for which he coined the name speed independent circuits. An account of this formalization is given in [24, 25] Informally, a speed independent circuit is a network of gates that satisfies its specification ....

....use of isochronic forks gives more design freedom in exchange for less delay insensitivity, care has to be taken with its implementation [29] 10 3. 2 Asynchronous Sequential Machines The design of asynchronous sequential finite state machines was initiated with the pioneering work of Huffman [23]. He proposed a structure similar to that of synchronous sequential circuits consisting of a combinational logic circuit, inputs, outputs, and state variables [14] Huffman circuits, however, store the state variables in feedback loops containing delay elements, instead of in latches or ....

D. A. Huffman, "The synthesis of sequential switching circuits," IRE Transactions on Electronic Computers, vol. 257, no. 3 & 4, 1954.

.... recent years, there has been significant progress in developing methods and tools for asynchronous circuit synthesis [21, 17, 19, 25, 5] The two chief directions in this work have been following the two, traditionally competing, synthesis approaches, one basedon the Huffman s state machinemodel [7, 22], the other deriving from Muller s concept of a speed independent circuit [14] The former, also known as fundamental mode circuit design, makes strong assumptions about the delay of the environment compared to that of the circuit. It requires that the environment be slow enough in applying the ....

D. A. Huffman. The synthesis of sequential switching circuits. J. Franklin Institute, 257:161--190,275--303, March 1954.

....for the problems presented here is an interesting topic. We are not aware of any work in this direction. COARSEST PARTITION PROBLEMS Coarsest partition problem is a restatement of DFA minimization problem. This problem has a long history dating back to the origins of automata theory. Huffman [20] and Moore [36] presented an algorithm for DFA minimization in 1950 s. Their algorithm runs in time O(kn 2 ) on DFA s with n states and k input symbols and was adequate for most of the classical applications. Many variations of this algorithm have appeared over the years; see [54] for a ....

D.A. Huffman, "The Synthesis of Sequential Switching Circuits", Journal of Franklin Institute, 257(3), pp.161-190, 1954.

....produced by a regular grammar G there exists a (in general nondeterministic) finite automaton A accepting L [8] For every nondeterministic finite automaton there exists a deterministic one accepting the same language [26] The construction is exponential. The minimization is polynomial in time [15, 23]. Two minimized finite automata accepting the same language are isomorphic and differ only in the names of the states [24] The inclusion of two minimized finite automata can be checked in linear time for example by depths first search over the states. The finite automaton that is constructed ....

D. A. Huffman. The synthesis of sequential switching circuits. Journal of the Franklin Institute, 3-4(2):161--190 and 275--303, 275 1959.

....His tool, ATACS, synthesizes very compact area efficient generalized C element circuits by exploiting all known delays, both internal and external. Asynchronous finite state machines. AFSMs have been around for the past 30 years. The work on AFSMs was pioneered by Huffman and others. Early AFSMs [18], 19] assumed that the environment operates in fundamental mode, that is, the environment generates a single input change and waits for the machine to stabilize before it generates the next input change. Recent work in AFSMs allows the multiple input change fundamental mode operations. We focus ....

....IMPLEMENTATION OVERVIEW In all sequential machines, the machine output depends not only on the inputs but also on the state of the machine, which keeps track of the history of input changes. All sequential machines use feedback to store the state of the machine. In Huffman mode state machines [18], 19] the state of the machine is stored only in internal state variables primary outputs do not store any state information. In our 3D machines, however, primary outputs are used to store the state of the machine whenever possible in order to minimize the number of internal state ....

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D. A. Huffman, "The synthesis of sequential switching circuits," in Sequential Machines: Selected Papers, E. F. Moore, Ed. Addison-Wesley, 1964.

....information. This synchronization is not achieved by means of a global clock but 82 CHAPTER 4. ASYNCHRONOUS SYSTEMS 83 rather, by the communication protocol employed. Asynchronous design techniques have been explored since, at least, the mid 1950s by a number of researchers including Huffman [Huff54], Muller and Bartky [Mull56] Unger [Unge69] Miller [Mill65] Keller [Kell74] and Seitz [Seit70] Seit80] An influential contribution in the field was the Macromodules project at Washington University, St. Louis, where Molnar and Clark demonstrated the design simplicity and modularity resulting ....

Huffman, D. A.,"The Synthesis of Sequential Switching Circuits", Journal of the Franklin Institute, 257, 3, March 1954, pp. 161-190.

....trellis coding and error performance estimation should be beneficial. 1. 4 Overview of the Thesis In this thesis, the distance spectrum calculation for a general trellis code is tackled using finite state machine theory, especially the state minimisation algorithm first proposed by Huffman (1954) [49] Mealy (1955) 50] and Moore (1956) 51] Firstly the method of construction of a single finite state machine from multiple several FSM s is proposed. Then the state space partitioning method is illustrated. As an extension to the classical FSM theory, a time inverse state space partitioning ....

....The theory of FSM s was mainly developed in the 1950 s. General finite state machine theory and applications can be found in text books on discrete mathematics [75, 76, 77] and digital switching theory [78, 79] Central to the theory is the state minimisation process credited to Huffman (1954) [49] Mealy (1955) 50] and Moore (1956) 51] Various aspects of the theory were refined through the early 1960 s [80] Some improved algorithms were developed as late as 1970. One such is the Hopcroft state minimisation algorithm [81] although it should be noted that this is still not optimal [82] ....

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D. A. Huffman, "The synthesis of sequential switching circuits," J. of Franklin Inst., vol. 257, pp. 161--190, 275--303, 1954.

.... Huffman circuits, where a block primary inputs primary outputs feedback wires Figure 3: Example of a Huffman circuit of combinational logic implements the next state and output functions derived from a Flow Table specification, and feedback wires implement the state (see, e.g. Figure 3 and [5], 14] 2) Burst Mode Finite State Machine (FSM) circuits [12, 16] 3) Bounded delay circuits synthesized from a Signal Transition Graph specification, where a block of combinational logic implements the next state function of each state and output function, and feedback wires implement the ....

D. A. Huffman. The synthesis of sequential switching circuits. J. Franklin Institute, 257:161--190,275--303, March 1954.

....view of the trees, sharing may occur between trees which are structurally quite different, but which happen to have common parser actions associated with them. 3 Merging and minimising automata Combining the automata for several trees can be achieved using a variety of standard algorithms (Huffman, 1954; Moore, 1956) However any transformations must respect one important feature: once the parser reaches a final state it needs to know what tree it has just recognised 4 . When automata for trees with different root categories are merged, the resulting automaton needs to somehow indicate to the ....

D. A. Huffman. 1954. The synthesis of sequential switching circuits. J. Franklin Institute.

....to prove that with high probability the hypothesis automaton LEARNING FALLIBLE DETERMINISTIC FINITE AUTOMATA 23 defined based on P fnl is an ffl good hypothesis. The resulting automaton might be much larger than the minimal equivalent automaton and so we apply an algorithm for minimizing DFAs [18], 27] 17] and find the smallest equivalent automaton. The final partition is defined in the following simple manner. For any given string r 2 R, let r = r p Delta r s where jr s j = l 2 . Let the prefix class of r, denoted by C p (r) be the class r p belongs to in P int . Then P fnl def = ....

D. A. Huffman. (1954). The synthesis of sequential switching circuits. J. Franklin Institute, 257 , 161--190, 275--303.

....main reason for this decline is that designing asynchronous circuits has been traditionally considered difficult. Since clocked synchronous circuits were much easier to design and did not do their work worse than their tricky counterparts, the latter were forgotten and the pioneer work by Huffman [Huf64] Muller [MB59, Mul63] and others, was covered by dust. The simple structure of synchronous circuits, cones of combinational logic followed by clocked flip flops, allows a very important abstraction: time becomes a discrete rather than a continuous magnitude. Therefore, the state of a circuit ....

....(a) b) c) Figure 1.4 (a) Feedback, b) gate and (c) wire delay models. By choosing different combinations of delay magnitude, type and model, several types of asynchronous circuits can be considered. Next, the most commonly used asynchronous circuit models are described. Huffman model Huffman [Huf64] proposed representing an asynchronous circuit by splitting the circuit into two differentiated parts: the combinational subnetwork, following the bounded inertial wire delay model, and the feedback lines, modeled by using unbounded inertial feedback delays. Other models have been proposed as ....

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D. A. Huffman. The synthesis of sequential switching circuits. In E. F. Moore, editor, Sequential Machines: Selected Papers. Addison-Wesley, 1964.

....nominal delay. Because of statistical fluctuations in the manufacturing process and of modeling errors, for example the delay on the wires themselves, a lower and an upper bound on the nominal delay are considered when verifying the circuit with timing analysis. This delay model was introduced by [Huf54] (together with the assumption, that we shall not make, that input changes are applied only when the circuit is known to be stable) In this paper we introduce a new synthesis procedure, that can be proved to generate hazard free circuits from an STG specification, both with the unbounded ....

D. A. Huffman. The synthesis of sequential switching circuits. J. Franklin Institute, 257:161--190,275--303, March 1954.

....be modeled by using the tracking delay model of Lam and Brayton [14] it is beyond the scope of this paper. We view an asynchronous circuit as a combinational network with some (or all) of its outputs fed back as inputs to the network. This is the classical Huffman model of asynchronous circuits [15]. Our approach to timing analysis consists of the following steps applied to the combinational network obtained by cutting the feedback loops: 1) First, we identify gates with potentially spurious transitions or hazards [16] on their outputs, generated as a result of timing constraint violations. ....

D. A. Huffman, "The synthesis of sequential switching circuits," Journal of the Franklin Institute, pp. 161--190,275--303, March, April 1954.

....in a limited way by assuming that the environment must wait long enough for the circuit to stabilize before inputs are changed. To achieve this, these techniques must assume that the gate and wire delays are bounded. Techniques using the fundamental mode assumption originated with Huffman [34], and were later extended by Unger [68] Original fundamental mode techniques allowed only a single input to change at a time. Recently, Davis s group at Hewlett Packard [20] extended CHAPTER 1. INTRODUCTION 6 fundamental mode to allow multiple input change. Nowick developed a locally clocked ....

D. A. Huffman. The synthesis of sequential switching circuits. J. Franklin Institute, March, April 1954.

....even greater hurdle for asynchronous design is that most existing design methodologies are either not powerful enough or too difficult to use, and, in some cases, may not even produce correct results. The machines that were popular in the 1960 s, such as single input change Huffman mode machines [30, 69], are inadequate for today s design requirements. Describing asynchronous circuits using system modeling languages, such as Petri nets [56] is too complex for large machines. Because these languages were designed primarily for modeling, not every specifiable machine is implementable. Most ....

....use SI circuits as target implementations [13, 45, 2, 71] There have been some practical designs using SI circuits as well [41, 42] There is a wide spectrum of circuits that are not SI circuits. Clearly, synchronous circuits are not speed independent. All variations of Huffman mode machines [30, 69] fall outside of the SI category. In fact, we claim that the robustness of the circuit really depends on how localized the delay variations are. There is no need to make a sweeping assumption that every gate can have a delay between 0 and 1. Nor is it safe to assume that a wire that stretches from ....

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D. A. Huffman. The synthesis of sequential switching circuits. J. Franklin Institute, March, April 1954.

.... [PTB] GI] JRy] JRy2] CH] AIP] JK] and [S] The study of several cycles also lead to the result in [IS] which was used later in [GI2] For a lower bound on KFSP, see [GPPL95] and for the single function case of this see [GB95] Implementation specific details for the standard methods in [H1], M] see also [HU] are considered in [B] and a comprehensive historical survey is given in [W] A transitive closure interpretation in [DST] also considered the acyclic restriction of KFSP. KFSP along with other related problems were also considered in [CH2] In the next section are the lower ....

....for a special case of the set partition problem, Parallel Algorithms and Applications 10 pp105 109 (1995) H] Hopcroft J. An O(nlogn) algorithm for minimizing states of a finite automaton, Kohavi Z. and Paz A. Eds) Theory of Machines and Computations, Academic Press, NY pp189 196 (1971) [H1] Huffman D. The synthesis of sequential switching circuits, Journ. Franklin Institute 257 pp161 190 and pp275 303 (1954) HU] Hopcroft J. and Ullman J. Introduction to Automata theory, Languages, and Computation, Addison Wesley (1979) I] Immerman N. Nondeterministic space is closed under ....

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Huffman D., The synthesis of sequential switching circuits, Journ. Franklin Institute 257 pp161-190 and pp275-303 (1954).

....3.3) ffl pure delay model, 6 We associate a node with each input of an ALC to provide the way of modeling the input wires of the circuit as components with potential delay properties. ffl inertial delay model. 2. Delay model of the circuit (delay model in large ) ffl feedback delay model ([8]) assuming that there are delays only in the feedback wires. ffl gate delay model, 18] assuming that only the logic elements have finite delays. ffl gate and wire delay model, 3] and [4] assuming that both gates and wires have finite delays. 3. Environment behavior model (input change ....

D. A. Huffman. The synthesis of sequential switching circuits. J. Franklin Institute, 257:161--190,275--303, March 1954.

No context found.

D. A. Huffman, "The synthesis of sequential switching circuits," J. Franklin Inst., part I, vol. 257, no. 3, pp. 161--190, Mar. 1954.

No context found.

Huffman, D. A. (1954). The synthesis of sequential switching circuits. Journal of the Franklin Institute, 257(3-4):161--190, 275--303.

No context found.

D.A. Huffman, "The Synthesis of Sequential Switching Circuits," Journal of the Franklin Institute, Vol. 257, No's. 3-4, pp. 161-190, 275-303; March and April, 1954.

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