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J. Hall, "An electroid switching model for reversible computer architectures," in Proc. of the Workshop on Physics and Computation, IEEE Press, 1993. PhysComp '93.

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Asymptotically Zero Power in Reversible Sequential Machines - Patra (1995)   (Correct)

....of gate level transitions for computation or data transmission, etc. See, e.g. 1, 2] The need for extremely energy efficient computers for many present and future applications has been well articulated, and new approaches along the line of reversible or adiabatic computation are discussed in [3, 4, 5, 6, 7, 8]. Many of these and other papers also point out the very dissipative physical nature of present day computers and computations. Much of research in this second category has focused on obtaining reversible computer architectures to eliminate energy dissipation in principle. The idea is based on the ....

....redundant information is generated which is eventually unwritten. The input signals, modified only by circuit s environment, are held stable suitably long after the outputs have been generated in order to facilitate the unwriting as well as to store the next state value non dissipatively ([6, 8, 10]) 1Present day computers dissipate upwards of 108kT joules per bit operation. Irrespective of techniques, traditional or not, all low power design approaches must make tradeoffs between the throughput and the energy consumption in a system. 1.1 Adiabatic switching CMOS devices are very ....

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J. Hall, "An electroid switching model for reversible computer architectures," in Proc. of the Workshop on Physics and Computation, IEEE Press, 1993. PhysComp '93.


On Efficient Adiabatic Design of MOS Circuits - Patra, Fussell (1996)   (1 citation)  (Correct)

....increasing levels of device integration are likely to eventually require more radical techniques to reduce this 1 2. C. Va dissipation per node. In recent years, a number of investigators have been exploring an alternative circuit design methodology based on the concepts of adiabatic computation [6, 7, 8, 14] in reversible [3, 4] pipelines. Adiabatic computation allows one to trade time for reduction in dissipation by carefully controlling and extending the duration of each computation step. Power is supplied to the circuit through clock lines using a power supply designed to recover energy not ....

....consumed in the circuit by sufficiently slowing down the rise and fall of the circuit s clocks which, as we will see, serve as the power supplies as well. 3 Reversible pipelines for high throughput In [1] Athas et al. propose a method of pipelining to make the retractile cascades suggested in [6] practical for reversible computation. The improvement due to pipelin ing of reversible computation is essentially twofold: 1) the throughput of the system is unity as opposed to 1IN in an N stage cascade, 2) the bound on the number of power supplies needed to operate the pipelined cascade is ....

J. S. Hall. An electroid switching model for reversible computer architectures. In Proc. of the Workshop on Physics and Computation. IEEE Press, 1993. PhysComp '93.


Conservative Delay-Insensitive Circuits - Patra, Fussell (1996)   (Correct)

....leads to a thermodynamic minimum heat dis sipation of kT In 2 joules per bit. Bennet [2] proved that irreversible logic gates and information erasure is not fundamental to computation. Since then various computational techniques have been proposed to avoid dissipation by unwriting information [1, 8, 9, 13, 15, 25] instead of erasing it. Some of the important facts about physical processes relevant to asymptotically nondissipative computation may be summarized as follows. The physical state of a closed system is a subset of all allowable physical configurations of the system, i.e. a subvolume of its ....

J. S. Hall. An electroid switching model for reversible computer architectures. In Proc. of the Workshop on Physics and Computation. IEEE Press, 1993. PhysComp '93.


Relativized Separation of Reversible and Irreversible.. - Frank, Ammer   (Correct)

....although we might be able to a ord to build nanocomputers with ever increasing numbers of bit devices, we might not be able to operate them for long at anywhere close to their peak performance. This problem has been pointed out before by nanotechnology visionaries Drexler, Merkle, Hall, and others [1, 2, 3]. REVERSIBLE AND IRREVERSIBLE SPACE TIME COMPLEXITY CLASSES 3 FIG. 1. This graph shows the CV 2 =2 energy required to charge the gate of a minimumsized transistor, computed from gures for power supply voltage, minimum transistor length, and gate oxide thickness listed in the 1994, 1997, and ....

J. Storrs Hall. An electroid switching model for reversible computer architectures. In PhysComp92 [35], pages 237247. 38 MICHAEL P. FRANK AND M. JOSEPHINE AMMER


A Framework for Conservative and Delay-insensitive Computing - Patra, Fussell   (Correct)

....leads to a thermodynamic minimum heat dissipation of kT ln 2 joules per bit. 1 Bennet [2] proved that irreversible logic gates and information erasure is not fundamental to computation. Since then various computational techniques have been proposed to avoid dissipation by unwriting information [1, 8, 9, 13, 15, 25] instead of erasing it. Some of the important facts about physical processes relevant to asymptotically non dissipative computation may be summarized as follows. ffl The physical state of a closed system is a subset of all allowable physical configurations of the system, i.e. a subvolume of its ....

J. S. Hall. An electroid switching model for reversible computer architectures. In Proc. of the Workshop on Physics and Computation. IEEE Press, 1993. PhysComp '93.


Asymptotically Zero Power in Reversible Sequential Machines - Patra, Fussell (1995)   (Correct)

....low power design approaches must fundamentally make tradeoffs between the throughput and the energy consumption in a system: more energy is consumed to run a circuit faster. This chapter explores a novel, practical method for low power circuit design based on the concepts of adiabatic computation [1, 2, 3, 4] in reversible [5, 6] pipelines. Adiabatic computation allows one to trade time for reduction in dissipation by carefully controlling and extending the duration of each computation step. In the following, we describe efficient circuit architectures and timing schemes for adiabatic operation of ....

....as the power supplies as well. 3 Reversible pipelines for high throughput Athas et al. have demonstrated impressive advantages of adiabatic switching in small experimental circuits such as a CMOS line driver. In [7] they propose a method of pipelining to make the retractile cascades suggested in [1] practical for reversible computation. The improvement due to 4 pipelining of reversible computation is essentially twofold: 1) the throughput of the system is unity as opposed to 1=N in an N stage cascade, 2) the bound on the number of power supplies needed to operate the pipelined cascade is ....

J. S. Hall, "An electroid switching model for reversible computer architectures, " in Proc. of the Workshop on Physics and Computation, IEEE Press, 1993. PhysComp '93.


Pendulum: A Reversible Computer Architecture - Vieri (1995)   (6 citations)  (Correct)

....engine which performed energy recovery. Koller and Athas [KA92] using techniques similar to SCRL, have developed a method of driving highly capacitive wiring and gate loads while recovering the energy. Their work on power supply design is similar to the power supply work needed for SCRL. Hall s [Hal92] retractile cascade circuits use a series of clocks and inherently pipelined primitives which are very similar in spirit to SCRL gates. 2.3 Architecture This section addresses the previous work in developing computing paradigms that avoid logically irreversible operations. Ressler [Res81] ....

....that distinguish his processor from a standard accumulator based processor. Regardless, 19 his design is remarkable in that he was able to design an entire processor using on the order of 5000 reversible Fredkin gates. More recently, Hall [Hal94] building on his work with retractile cascades [Hal92], discussed a reversible processor architecture and algorithms based on the PDP 10 instruction set. The decision to use a CISC instruction set al..lows shorter code, but for this thesis, a more straightforward RISC style makes the datapath and controller design simpler. Hall does not suggest even a ....

J. Storrs Hall. An electroid switching model for reversible computer architectures. In Physics and Computation, pages 237--247, October 1992.


Asymptotically Zero Energy Computing Using Split-Level Charge.. - Younis (1994)   (10 citations)  (Correct)

....voltage. Furthermore, we have to hold on to this information throughout the transition. Stated more clearly, to non dissipatively set the state of the output we must at all times have a copy of it. The only way out of this circle is to use reversible logic. Recent and independent work by Hall [16] and Merkle [33] showed how to connect Retractile Cascade stages to eliminate the power dissipation in the latches that were used to hold on to past values. These two proposals are worthy of note since they are the only ones that conform to the two conditions of quasistatic operation outlined ....

Hall, J.S., " An Electroid Switching Model for Reversible Computer Architectures," in Proceedings of Physics of Computation Workshop, Dallas Texas, October 1992.


Reversible Computing for Energy Efficient and Trustable.. - Knight, Jr. (1995)   (Correct)

....his work is important in that it reflects the earliest work we are aware of which is directly relevant to our goal of architecting fully reversible computers. Ressler never published his work, and his Ph.D. thesis and subsequent work is in a different field. Storrs Hall has recently suggested [Hal92] an architecture for a reversible machine which is similar in architecture to the PDP 10 computer. He points out the potential importance of index registers and a relatively complex instruction set in a reversible machine as a means 21 of reducing the number of intermediate register stores. We ....

....excellent work of Koller and Athas [KA92] at USC ISI has concentrated on using techniques very similar to ours as a method of driving highly capacitive wiring and gate loads while recovering the energy. Their work on power supply design is synergistic with much of our work on SCRL. Storrs Hall [Hal92] at Rutgers has recently worked on latch design using techniques very similar in spirit to SCRL gates. A clear distinction must be made between reversible computation based ideas and the energy recovery techniques which rely on diode based charge recovery [DAD 94, HS94] These diode based ....

J. Storrs Hall. An electroid switching model for reversible computer architectures. In Physics and Computation, pages 237--247, October 1992.


Nanocomputers and Reversible Logic - Hall (1994)   (3 citations)  Self-citation (Hall)   (Correct)

No context found.

J. Storrs Hall, "An Electroid Switching Model for Reversible Computer Architectures" PhysComp '92: Workshop on Physics and Computation IEEE Press, 1992


A Reversible Instruction Set Architecture and Algorithms - Hall (1994)   (8 citations)  Self-citation (Hall)   (Correct)

....showing that, for example, a sorting algorithm need only dissipate O(n log n) bits even though it makes O(n 2 ) comparisons. Keywords reversible computation, entropy, heat dissipation, reversible algorithms, finite automata, computer architecture, retractile cascade, sorting 1 Introduction In [8] we introduced an electroid logic for the design of reversible computer architectures. It was at that time a conjecture, based on an observation of Merkle [10] that such a logic could be used to design a computer architecture that was not radically different from conventional ones at the ....

....Fig. 2 shows the clock sequence which accomplishes this. This technique can be used with any retractile cascade to erase as well as to produce the value given the inputs. Retractile cascades can be used for virtually all the medium scale components of a standard computer architecture. Hall [8] shows a PLA, a barrel shifter, register set, and so forth, implemented as retractile cascades. The register set (with a correction from the original, appears in Fig. 3. 1 This technique appears first to have been used systematically by Drexler [6] 3 Architecture level Reversibility In a ....

Hall, J. Storrs, "An Electroid Switching Model for Reversible Computer Architectures" PhysComp 92, IEEE Press, Los Alamitos, CA, 1993

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