J. S. Denker, S. C. Avery, A. G. Dickinson, et al., "Adiabatic computing with the 2N-2N2D logic family," in Proc. of the International Workshop on Low Power Design, 1994, pp. 183-187.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....much less energy than the complementary static CMOS circuit and other adiabatic logic circuits. Introduction: The principle of adiabatic switching recycles the signal energy to reduce energy dissipation. Many adiabatic logic circuits that utilize clocked power supply have been proposed recently [1 6]. In the adiabatic circuits, two types of energy consumption exist except leakage current loss: adiabatic loss and non adiabatic loss. The former is unavoidable, which is inversely proportional to the transition time of the input signal [6] The latter is proportional to the square of the voltage ....

....square of the voltage difference between the terminals of a switch when it is on, which is much larger than the former at low speed operation. Most of adiabatic circuits have non adiabatic loss because of the voltage drop across precharging diode or the incomplete recovery of the supplied charge [1 3]. Although the Merkle s logic in [4] eliminates the non adiabatic loss, it has the retractile cascades problem that the throughput is reduced if logic stages are cascaded. The SCRL in [5] employed the reversible logic to solve the problem without non adiabatic loss, but it requires too many ....

KRAMER, A., DENKER, J. S., AVERY, S. C., DICKINSON, A. G., and WIK, T. R.: `Adiabatic computing with the 2N-2N2D logic family'. Symposium on VLSI Circuits, 1994, pp. 25-26

....was possible to construct a conservative logic gate which was reversible but could be used to construct conventional AND and OR functions, so there is a general mechanism for constructing reversible logic circuits. These concepts have been used to minimise the heat dissipation in logic circuits [9, 5]. In our paper we have used the reversible computing concept to implement a novel form of self checking which can be applied at the software level rather than the circuit level. The reversible computing concept can be illustrated by the following simple example. The function maps the number ....

J.S. Denker, S.C. Avery, A. G. Dickinson, A. Kramer and T.R. Wik, "Adiabatic Computing with the 2N-2N2D Logic Family", International Workshop on Low Power Design, pp. 183--187, 1994

.... is carried out in an adiabatic manner [1] Recovered energy logic circuits accomplish this by charging and discharging circuit capacitances slowly so that the voltage across ON MOSFET switches is small and by switching on MOSFETs only when the potential difference across them is close to zero [2] [3], 4] By recovering the energy stored in circuit capacitances during the discharge process, recovered energy logic circuits have demonstrated the possibility of achieving energy savings as high as 99 per logic operation[2] Todays VLSI systems integrate both random logic and assorted memories. ....

J. S. Denker, S. C. Avery, A.G. Dickenson, A. Kramer and T. R. Wik, "Adiabatic Computing with the 2N-2N2D Logic Family" Proc. Intl. Workshop on Low Power Design, 1994, pp 177-182

....which rail to connect the node to in order to affect quasistatic charge transfer. A simple diode can however correctly make that decision for us. Recently two separate proposals have been forwarded that achieve energy reduction in CMOS circuits through using diodes. The first is by Denker et al. [9] while the second is by Hinman and Schlecht [17] Using a diode however violates the second of the two condition we have stated above. The fact is that charge transfer in a forward biased diode is not a quasistatic process even if the charge transfer proceeds slowly. This becomes evident when we ....

Denker, J. S., Avery, S. C., Dickinson, A. G., Kramer A., and Wick, T. R., "Adiabatic Computing with the 2N-2N2D Logic Family," Proceedings of the 1994 International Workshop on Low Power Design, Napa, 1994, pp. 183-187.

....and two phase sinusoidal clocks. SPICE simulation shows that the QSERL multiplier can save 37 of energy over static CMOS multiplier at 100 MHz. 1 Introduction In the design of low power circuits, adiabatic logic shows great potential. Numerous designs of adiabatic logic have been presented in [1, 12, 5, 6, 9, 10, 7], demonstrating the possibility of achieving ultra low energy computing. However, there are some common problems in realizing adiabatic logic. With few exceptions, adiabatic logic families are dynamic in nature and often use differential signaling, which is only suitable for some arithmetic ....

J.S.Denker, S.C.Avery, A.G.Dickinson, A.Kramer, and T.R.Wik, "Adiabatic Computing with the 2N2N2D logic Family," in Proc. Int. Workshop on Low Power Design, Napa Valley, California, 1994, pp. 183-187.

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J. S. Denker, S. C. Avery, A. G. Dickinson, et al., "Adiabatic computing with the 2N-2N2D logic family," in Proc. of the International Workshop on Low Power Design, 1994, pp. 183-187.

No context found.

Denker, J. S. et al, "Adiabatic Computing with the 2N-2N2D Logic Family", 1994 International Workshop on Low Power Design, Napa, CA, 1994

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