Y. A. Khalidi, M. Talluri, M. N. Nelson, and D. Williams. Virtual memory support for multiple page sizes. In Proceedings of the Fourth IEEE Workshop on Workstation Operating Systems, Napa, CA, 1993. 97  Home/Search   Document Details and Download   Summary   Related Articles   Check

....all service providers. Separate label data structure support is not restricted to LERs as in BGP MPLS VPN. Any LSRs within APLS network can support separate label data structures. Performance issues in APLS s multiple label data structures support are very similar to those found in Virtual Memory [40, 41] support in OS. How ever, OS characteristics are different to that found in networks, therefore, further research needs to be done to analyse the feasibility of multiple data structures. 5.5 APN APN [2] is seen as a complementary technology to APLS thus many con cepts introduced in APN can be ....

Y. Khalidi, M. Talluri, M. Nelson, and D. Williams, "Virtual Mem- ory Support for Multiple Page Sizes," in Workshop on Workstation Operating Systems, 1993, pp. 104-109.

....latency by prefetching entries (again, in software [4] or hardware [41] All of these approaches can be improved by exploiting superpages. Most commercial TLBs support superpages, and have for several years [30, 43] but more research is needed into how best to make general use of them. Khalidi [24] and Mogul [31] discuss the benefits of systems that support superpages, and advocate static allocation via compiler or programmer hints. Talluri et al. 32] report on many of the difficulties attendant upon general utilization of superpages, most of which result from the requirement that ....

Y. Khalidi, M. Talluri, M. Nelson, and D. Williams. Virtual memory support for multiple page sizes. In Proc. of the 4th Workshop on Workstation Operating Systems, pages 104--109, Oct. 1993.

....Most commercial TLBs support superpages, and have for several years [16, 28] but more research is needed into how best to make general use of them. Chen et al. 6] suggest the possibility of using variable page sizes to improve TLB reach, but do not explore the implications of their use. Khalidi [13] and Mogul [17] discuss the benefits of systems that support superpages, and advocate static allocation via compiler or programmer hints. Talluri et al. 18] report on many of the difficulties attendant upon general utilization of superpages, most of which result from the requirement that ....

Y. Khalidi, M. Talluri, M. Nelson, and D. Williams. Virtual memory support for multiple page sizes. In Proc. of the 4th WWOS, pp. 104--109, Oct. 1993.

....is usually dictated by the hardware or the OS or both. It is non trivial for the OS to handle any changes in the page sizes at runtime. Previous work done in this area by Talluri and Hill attempts to support multiple pagesizes, where each page size is an integral multiple of a base page size [17] [18] [19] Enhanced VM hardware (the Translation Lookaside Buffer (TLB) and an enhanced VM management policy must be available in the to support the proposed technique. It is possible that with the help of this extra hardware, multiple code page sizes can be used to handle variations in page size due ....

Y. A. Khalidi, M. Talluri, M. N. Nelson, and D. Williams, "Virtual memory support for multiple page sizes," Tech. Rep. TR-93-17, SUN Microsystems Laboratories, Sunnyvale, CA, 1993.

....nature, memory operations that involve the processor demand careful attention. Memory block moves involve moving blocks of data from one location in physical memory to another and are important for many applications. 1. Superpages: Grouping base pages together into superpages [2] 3] 4] [5] improves the Translation Lookaside Buffer (TLB) performance by increasing the coverage of the TLB without increasing the number of TLB entries. Creating a superpage requires that the constituent base pages be contiguous both in virtual as well as in physical address spaces. If the component pages ....

Khalidi Y. A., Talluri M., Nelson M., and Williams D. Virtual memory support for multiple page sizes. In Proceedings of the Fourth Workshop on Workstation Operating Systems, pages 104--109, 1993.

....sets of current and future workloads. The case that current virtual memory techniques will no longer be valid for the next generation of machines has been argued by others [26] Several ideas have been introduced to increase TLB reach. For example, trading associativity for increasing TLB entries [4, 14, 16] to increase TLB reach (address coverage) using the same silicon resources, multiple page sizes [14, 26, 18] to reduce the number of contiguously mapped pages and subblocking [25] to have more translations 1 held for each TLB cell. The design tradeoffs of silicon resource requirements, TLB access ....

....for the next generation of machines has been argued by others [26] Several ideas have been introduced to increase TLB reach. For example, trading associativity for increasing TLB entries [4, 14, 16] to increase TLB reach (address coverage) using the same silicon resources, multiple page sizes [14, 26, 18] to reduce the number of contiguously mapped pages and subblocking [25] to have more translations 1 held for each TLB cell. The design tradeoffs of silicon resource requirements, TLB access time, operating system support necessary are complex. Talluri concluded that partial subblocking offered ....

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Y A Khalidi, M Talluri, M N Nelson and D Williams. Virtual memory support for multiple page sizes. In Proc. 4th Wrk on WOS, pages 104-- 109, 1993.

....balance TLB polices versus the number of TLB entries. For instance, TLBs with high levels of associativity require more hardware resources to implement. This additional hardware complexity takes up silicon area on the die which could be allocated to build more entries. Studies by Khalidi et al. [7] and Nagle et al. [10] have indicated the potential for reducing TLB misses by decreasing associativity 1 levels in return for a TLB with a larger number of entries while consuming similar die space. Khalidi showed a 256 entry set associative TLB had a lower miss rate than a 64 entry ....

....for the construction of a larger TLB effectively reduces TLB misses. Alternatively, increasing the amount of memory mapped by each entry in the TLB by increasing the base page size or through the use of TLBs with multiple page size support has gained a lot of attention in recent TLB studies [7, 17, 11]. Large single base page size selection considers fragmentation, paging latency issues and page protection granularity. Alternatively, the multiple page size principle is to map frequently used smaller blocks as a single larger page. Thus, the coverage of some entries in the TLB can be increased ....

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Y A Khalidi, M Talluri, M N Nelson and D Williams. Virtual memory support for multiple page sizes. In Proc. 4th Wrk on WOS, pages 104-- 109, 1993.

....in modern systems. Many current processors support multiple page sizes, including the MIPS [Kane Heinrich 92] Alpha [Sites 92] and PowerPC [Mot 93] This enables a system to vary page size to best match the usage of each region of data. This ability requires operating system support [Mogul 93, Khalidi et al. 93] or minimal additional hardware [Talluri Hill 94] that is just now being implemented. Matching page sizes to client needs provides the benefits of large pages to clients that can use them, and avoids fragmentation for clients needing small pages. 2.4 Virtual memory backing storage and storage ....

YousefA. Khalidi, Madhusudhan Talluri, Michael N. Nelson, and Dock Williams. Virtual Memory Support for Multiple Page Sizes. In Proceedings of the 4th IEEE Workshop on Workstation Operating Systems, pages 104--109, Napa, California, October 1993.

....now support superpages, and have for several years [16, 27] but more research is needed into how best to make general use of this capability. Chen et al. 7] suggest the possibility of using variable page sizes to improve TLB reach, but do not explore the implications of their use. Khalidi et al. [15] and Mogul [17] discuss bene ts of systems that support superpages, advocating static allocation via compiler or programmer hints. Talluri et al. 18] report many of the diculties attendant upon general utilization of superpages, most of which result from the requirement that superpages map ....

Y. Khalidi, M. Talluri, M. Nelson, and D. Williams. Virtual memory support for multiple page sizes. In Proc. of the 4th WWOS, pp. 104-109, Oct. 1993.

....should be able to learn the syntax of the interaction dynamically. 1.2 Service Discovery and RPC The Remote Procedure Call paradigm (RPC) 7] has been largely responsible for the shape of distributed computing. Operating systems such as the Mach microkernel [17, 42] Amoeba [33, 50] Spring [19, 28], and V [12] range from being patterned after, to completely centered around RPC. Similarly, RPC is the central theme of most standards of distributed computing, including the Open Software Foundation s Distributed Computing Environment (OSF s DCE) and its Apollo predecessor [36] Sun s RPC [49] ....

Y. A. Khalidi, M. Talluri, M. N. Nelson, and D. Williams. "Virtual memory support for multiple page sizes." In Proc. Fourth Workshop on Workstation Operating Systems, October 1993.

....diagrams. The notation is a language independent mechanism for detailing the final design. Further details on this aspect of TSF can be obtained in [3] TSF aims to provide support in the following areas: Operating system policies can be tested. For example, multiple page size TLB designs [13], guarded page tables [15] and subblocking [20] All of these need operating system support to operate effectively. Multitasking work loads. Many experiments do not take either operating system references or multitasking effects into account. Smith [18] accommodates this through a reference ....

Y A Khalidi, M Talluri, M N Nelson, and D Williams. Virtual memory support for multiple page sizes. In Proc. 4th Wrk on WOS, pages 104--109, 1993.

....buffer. They have not yet been used to support general applications, which have more dynamic memory requirements. We believe the reason for this lack of support is straightforward: demonstrably goodmemorymanagement policies for superpages have been elusive [Talluri et al. 92, Talluri Hill 94, Khalidi et al. 93] A cost benefit analysis is required to determine if the overhead of constructing a superpage is outweighed by its benefit. Overhead arises becausea superpagemust map a physically contiguous range of memory, and the component pages of a candidate superpage may not be physically contiguous at the ....

....in performance within a constant factor of an optimal offline algorithm. Prior research in this area has influenced, for example, the design of synchronization [Karlin et al. 91] paging [Sleator Tarjan 85] and cache management algorithms [Cao et al. 94] Others [Chen et al. 92, Mogul 93, Khalidi et al. 93] have described the potential positive impact of a system that supports superpages, although they do not describe policies for promotion or demotion. Instead, they suggest that the programmer or compiler offer the operating system a hint about the appropriate page size for a particular range of ....

Khalidi, Y. A., Talluri, M., Nelson, M., and Williams, D. Virtual Memory Support for Multiple Page Sizes. In Proceedings of the Fourth Workshop on Workstation Operating Systems, pages 104--109, October 1993.

....page table combined with a fixed page size design. Several ideas have been introduced to increase TLB reach. Some alternative ideas are: ffl Trading associativity for increasing TLB entries [3] to increase TLB reach (address coverage) using the same silicon resources. ffl Multiple page sizes [17, 28, 22] to reduce the number of contiguously mapped pages. ffl Subblocking [27] to increase the number of translations held for each fully associative TLB cell. ffl Hash indexed page table [12, 21] to provide full translation of all physical pages. ffl Guarded page tables [19] to reduce the effective ....

....evaluated without some form of operating system support. Conceptually the simulator is partitioned into software and hardware layers as shown in figure 1. TSF aims to provide support in the following areas. ffl Operating system policies can be tested. For example, multiple page size TLB designs [17], guarded page tables [19] and subblocking [27] All of these need operating system support to operate effectively. ffl Multitasking work loads. Many experiments do not take either operating system references or multitasking effects into account. Smith [25] accommodates this through a reference ....

[Article contains additional citation context not shown here]

Y A Khalidi, M Talluri, M N Nelson and D Williams. Virtual memory support for multiple page sizes. In Proc. 4th Wrk on WOS, pages 104-- 109, 1993.

....do not evaluate these proposals, however. ffl Mogul [Mogul 93] also suggests using large pages to increase TLB coverage. He describes qualitatively the tradeoffs involved in constructing superpages dynamically, and suggests this as a possible research direction. Talluri et al. Talluri et al. 92, Khalidi et al. 93, Talluri Hill 94, Talluri 95, Talluri et al. 95] go further, proposing techniques that use the operating system to improve TLB performance without requiring user level intervention. They consider superpages, but focus on proposed partial subblock TLBs. A subblock TLB, akin to a subblock cache ....

Y. A. Khalidi, M. Talluri, M. Nelson, and D. Williams. Virtual Memory Support for Multiple Page Sizes. In Proceedings of the Fourth Workshop on Workstation Operating Systems, pages 104--109. IEEE, October 1993.

....R4000 allow mappings for superpages to reside in the TLB alongside normal mappings, and the PowerPC defines a Block TLB to be accessed in parallel with the normal TLB. Several studies have shown significant performance gains for reducing the number of TLB entries to cover the current working set [33, 47, 49]. Direct memory access. Direct memory access (DMA) allows asynchronous copying of data from I O devices directly to main memory. It is difficult to implement with virtual caches, as the I O space is usually physically mapped. The I O controller has no access to the virtualphysical mappings, and ....

Y. A. Khalidi, M. Talluri, M. N. Nelson, and D. Williams. "Virtual memory support for multiple page sizes." In Proc. Fourth Workshop on Workstation Operating Systems, October 1993.

.... translation performance becomes a very real limitation on system performance [Kotz and Crow, 1994] Talluri s investigation of techniques designed to increase TLB reach [Talluri, 1995] concluded that partial subblocking [Talluri and Hill, 1994] offered the best compromise between superpages [Khalidi et al. 1993; Talluri et al. 1992] and fully subblocked [Talluri and Hill, 1994] TLB alternatives. However, the partialsubblocked TLB proposal has two deficiencies. Firstly, TLB performance degrades under high memory utilisation, and secondly, the effects of the physical page allocation restrictions on ....

Khalidi, Y A, Talluri, M, Nelson, M N, and Williams, D (1993). Virtual memory support for multiple page sizes. In Proc. 4th Wrk on WOS, pages 104--109.

....page table combined with a fixed page size design. Several ideas have been introduced to increase TLB reach. Some alternative ideas are: Trading associativity for increasing TLB entries [3] to increase TLB reach (address coverage) using the same silicon resources. Multiple page sizes [15, 23, 20] to reduce the number of contiguously mapped pages. Subblocking [22] to increase the number of translations held for each fully associative TLB cell. Hash indexed page table [12, 19] to provide full translation of all physical pages. Guarded page tables [17] to reduce the effective ....

Y A Khalidi, M Talluri, M N Nelson, and D Williams. Virtual memory support for multiple page sizes. In Proc. 4th Wrk on WOS, pages 104--109, 1993.

....of the PA RISC 2.0 architecture [10] supports 16KB, 64KB, 256KB, 1MB, 4MB, 16MB, and 64MB pagesizes. Other architectures that allow multiple pagesizes include DEC Alpha [3] MIPS R10000 [16] and SPARC [7] Several issues need to be considered when implementing OS support for multiple pagesizes [11, 17, 21]. How should the VM data structures, which were originally designed to represent a uniform pagesize such as 4KB, be redesigned or adapted to allow coexistence of multiple pagesizes How will the pagesize be chosen for a given mapping Should a large mapping be created at fault service time Or, ....

Y. A. Khalidi, M. Talluri, M. N. Nelson, and D. Williams. Virtual Memory Support for Multiple Page Sizes. In Proceedings of the Fourth Workshop on Workstation Operating Systems (WWOS), pages 104--109, October 1993.

....mapped page table combined with a fixed page size design. Several ideas have been introduced to increase TLB reach. Some of which are: ffl Trading associativity for increasing TLB entries [2] to increase TLB reach (address coverage) using the same silicon resources. ffl Multiple page sizes [15, 26, 20] to reduce the number of contiguously mapped pages. ffl Subblocking [25] to have more translations held for each fully associative TLB cell. ffl Hash indexed page table [10, 19] to provide full translation of all physical pages. ffl Guarded page tables [17] to reduce the effective depth of ....

....evaluated without some form of operating system support. Conceptually the simulator is partitioned into software and hardware layers as shown in figure 1. TSF aims to provide support in the following areas. ffl Operating system policies can be tested. For example, multiple page size TLB designs [15], guarded page tables [17] and subblocking [25] all need operating system support to operate effectively. ffl Multitasking work loads. Many experiments do not take either operating system references or multitasking effects into account. Smith [23] accommodates this through a reference count ....

[Article contains additional citation context not shown here]

Y A Khalidi, M Talluri, M N Nelson and D Williams. Virtual memory support for multiple page sizes. In Proc. 4th Wrk on WOS, pages 104--109, 1993.

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Y. A. Khalidi, M. Talluri, M. N. Nelson, and D. Williams. Virtual memory support for multiple page sizes. In Proceedings of the Fourth IEEE Workshop on Workstation Operating Systems, Napa, CA, 1993. 97

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Y. Khalidi, M. Talluri, M. Nelson, and D. Williams. Virtual memory support for multiple page sizes. In Proc. of the 4th Workshop on Workstation Operating Systems, pages 104-109, Napa, CA USA, Oct. 1993.

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