| X. Shen and Arvind. Modeling and Veri cation of ISA Implementations. Technical Report 400 B, Laboratory for Computer Science - MIT, 1998. |
....implementation of higher order programming languages and proof assistants. In recent years some work on applying rewriting techniques to model and veri cation of digital processors has been developed. In particular, Arvind s group has treated the design of processors over simple architectures [13, 14, 1] and synthesis of digital circuits [8] Their approach to architectural description was to describe a simple RISC processor using TRS and to translate it to a standard hardware description language for simulation purposes. However, this approach introduces the cost of program translation and ....
....control the updating of the BTB for dynamic speculation (through the changebtb rule) As previously mentioned, one useful feature of rewrite based design of processors is the possibility to prove the correctness of the implementation of the speci ed instruction set. The main idea, according to [13, 14, 1], is to design a function that can extract all the programmer visible states, i.e. the program counter, the register le and the memory from the system. In particular, it is easy to show that the speculative processor simulates the basic one. In fact, a basic processor term can be upgraded to ....
X. Shen and Arvind. Modeling and Veri cation of ISA Implementations. Technical Report 400 B, Laboratory for Computer Science - MIT, 1998.
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X. Shen and Arvind. Modeling and Veri cation of ISA Implementations. Technical Report 400 B, Laboratory for Computer Science - MIT, 1998.
No context found.
X. Shen and Arvind. Modeling and Veri cation of ISA Implementations. Technical Report 400 B, Laboratory for Computer Science - MIT, 1998.
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