| X. Shen and Arvind. Design and Veri cation of Speculative Processors. Technical Report 400 A, Laboratory for Computer Science - MIT, 1998. |
....implementation of higher order programming languages and proof assistants. In recent years some work on applying rewriting techniques to model and veri cation of digital processors has been developed. In particular, Arvind s group has treated the design of processors over simple architectures [13, 14, 1] and synthesis of digital circuits [8] Their approach to architectural description was to describe a simple RISC processor using TRS and to translate it to a standard hardware description language for simulation purposes. However, this approach introduces the cost of program translation and ....
....Term Rewriting System, TRS for short, is de ned as a triple hS; R; S 0 i, where S and R are respectively sets of terms and of rewrite rules of the form s 1 s 2 if p(s 1 ) being s 1 ; s 2 terms and p a predicate and where S 0 is the subset of initial terms of S. In the architectural context of [13], terms and rules represent states and state transitions, respectively. A term s 1 can be rewritten to the term s 2 , denoted by s 1 s 2 , whenever there exist a subterm s 1 of s 1 that can be rewritten according to some rewrite rule into the term s 2 such that replacing the occurrence of ....
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X. Shen and Arvind. Design and Veri cation of Speculative Processors. Technical Report 400 A, Laboratory for Computer Science - MIT, 1998.
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X. Shen and Arvind. Design and Veri cation of Speculative Processors. Technical Report 400 A, Laboratory for Computer Science - MIT, 1998.
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X. Shen and Arvind. Design and Veri cation of Speculative Processors. Technical Report 400 A, Laboratory for Computer Science - MIT, 1998.
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