| M. Burtscher and B.G. Zorn. "Exploring Last n Value Predictor". In Proceedings of the 1999 IEEE International Conference on Parallel Architecture and Compiliation Techniques, pages 66-76. |
....chains speculatively [20] This prediction will allow the processor to issue the dependent instructions earlier than it can without value prediction. The last value predictor and the stride based predictor produced about 15 speedup using a PowerPC processor model [20] Burtscher and Zorn [2] found that storing four previous values for each load instruction in a 21 kilobyte load value predictor could generate 12.5 average speedups. Rychlik et al. [27] proposed a detailed implementation of a value speculative PowerPC 604 processor. They also proposed the dynamic classification scheme ....
M. Burtscher and B.G. Zorn. "Exploring Last n Value Predictor". In Proceedings of the 1999 IEEE International Conference on Parallel Architecture and Compilation Techniques, pages 66-76.
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M. Burtscher and B.G. Zorn. "Exploring Last n Value Predictor". In Proceedings of the 1999 IEEE International Conference on Parallel Architecture and Compiliation Techniques, pages 66-76.
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