Fournier, L., A. Koyfman and M. Levinger, Developing an Architecture Validation Suite---Application to the PowerPC Architecture, in: Proc. 36th ACM Design Automation Conf., 1999, pp. 189--194. Home/Search Document Details and Download
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Model-Based Test Case Generation for Smart Cards - Philipps, Pretschner.. (2003) (1 citation) (Correct)
....are also advocated in [11,12] the latter of which is also concerned with smart card testing. While conceptually similar, they seem not to use state storage strategies and the directed approach which we deem essential for the e#ciency of symbolic execution. In the domain of processor validation [6,20], among others, use finite state machines possibly automatically abstracted from VHDL code to generate tests. These approaches do not profit from the advantages of symbolic execution with constraints. Symbolic execution for test case generation was widely discussed in the Seventies, e.g. 8] ....
Fournier, L., A. Koyfman and M. Levinger, Developing an Architecture Validation Suite---Application to the PowerPC Architecture, in: Proc. 36th ACM Design Automation Conf., 1999, pp. 189--194.
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