| A. Karatsuba and Y. Ofman. Multiplication of Many-Digital Numbers by Automatic Computers. In Doklady Akad. Nauk SSSR 145, 293--294, 1962. Translation in Physics-Doklady 7, 595--596, 1963. |
....are executed for m = 163. To compensate for the missing shift operation in the latter case, a multiplexer was added to select the bits of Z # to be reduced. The reduction is hard wired and takes another clock cycle. The alternative designs we studied were based on the Karatsuba algorithm [14] and the LSD multiplier [22] Applying the Karatsuba algorithm to Figure 6, we first split the 64 bit by 256 bit multiplication X[63. 0]#Y [255. 0] into four 64bit by 64 bit multiplications X[63. 0] Y [255. 192] and then use the Karatsuba algorithm to calculate the four partial products. ....
Karatsuba, A., Ofman, Y.: Multiplication of Many-Digital Numbers by Automatic Computers. Doklady Akad. Nauk, SSSR 145, 293-294. Translation in Physics-Doklady 7, 595-596, 1963.
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A. Karatsuba and Y. Ofman. Multiplication of Many-Digital Numbers by Automatic Computers. In Doklady Akad. Nauk SSSR 145, 293--294, 1962. Translation in Physics-Doklady 7, 595--596, 1963.
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