Zivojnovic, V., J.M. Velarde, C. Schlager and H. Meyr, DSPstone: A DSP-Oriented Benchmarking Methodology, Proceedings of Signal Processing Applications & Technology, Dallas 1994.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....high level compilation is a necessity. However, the biggest drawback to both DSP processors or DSP core use is the code generation. The use of conventional code generation techniques and even compilers specifically designed for commercial DSP processors produce very inefficient code [2] 4] [24]. There are many more limitations placed upon code generation for the DSP processor than for the general purpose processor. The difficulty arises from nonhomogeneous register sets, small number of very specialized registers, very specialized functional units, restricted connectivity, limited ....

V. Zivojnovic, J. Martinez Velarde, and C. Schlager, "DSPstone: A DSP-oriented benchmarking methodology," in Proc. Int. Conf Signal Processing Applications and Technology, Oct. 1994.

....The generated VHDL description can then be used by a behavioral synthesis tools to generate a register transfer level (RTL) description of the system that can be further compiled into hardware using logic synthesis and layout tools. HLL compilers for DSPs have been woefully inadequate in the past [35]. This has been because of the highly irregular architecture that many DSPs have, the specialized addressing modes such as modulo addressing, bit reversed addressing, and small number of special purpose registers. Traditional compilers are unable to generate efficient code for such processors. ....

V. Zivojinovic, J. M. Velarde, C. Schlager, and H. Meyr, "DSPStone---A DSP-oriented Benchmarking methodology," in Int. Conf. Signal Processing Application Technology, Dallas, TX, Oct. 1994, pp. 715--720.

....and audio players. The availability of appropriate benchmark suites has spurred innovation in hardware and software systems in the past. For example, benchmark suites such as Dhrystone[27] Linpack[11] SPECJVM[5] SPECjbb[4] SPEC2000[3] Mediabench[15] MiBench[13] PowerStone[16] DSPstone[30], Perfect Club[6] have been used widely for evaluating different architectures and software optimizations. These benchmark suites are generally targeted at non Java environments or high end desktop Java environments. With the proliferation of embedded devices that support Java, it is important to ....

V. Zivojnovi'c, J. Mart'inez, C. Schlager, and H. Meyr. DSPstone: a DSP-oriented benchmarking methodology. In ICSPAT '94, Dallas, Oct. 1994.

....synthesis efforts to poorly designed benchmarks can be very costly due to the resource restricted nature of embedded systems. Most benchmarks designed to evaluate DSP systems have mainly been composed of a mix of low level kernels or small hand written applications in assembly lan guage [13, 15, 16]. Many general purpose processors with so called multimedia extensions were mainly motivated and developed by benchmarks based on the kernels. Two major problems have been raised concerning the validity and usefulness of the existing benchmarks. First, quality and performance of the existing ....

....selection and an experimental core based system synthesis based on the selected benchmark suite is discussed. Finally, Section VIII draws conclusions. II. PREVIOUS WORKS AND OUR CONTRIBUTIONS Most DSP system evaluation has been focused on assem bly language or the use of very small kernels [16]. Saghir et al. developed a mix of low level kernels and small applications with the goal of compiler evaluation and system synthesis [14] This suite emphasizes kernel codes and low level filter operations. Flrthermore, no clear mea surement is made to establish the value of the new code base. ....

V. Zivojnovic, J. Martinez Velarde, C. Schlager, and M. Meyr. DSPstone: A DSP-oriented benchmarking methodology. In Proceedings of the 5th International Conference on Signal Processing Applications and Technology, volume 1, page 715720, Dallas, TX, USA, October 1994. 110

....and zero overhead hardware loops (ZOL) as well as results of the energy aware code generator GCG are presented. All presented data was generated using GCG and the GeLIR simulator considering the energy cost model of the M3 DSP. The benchmarks are taken from the DSPstone benchmark suite [25], with the existing pointer based memory accesses converted into array accesses by the pointer conversion algorithm described in [26] In all cases, we present results for a specific optimization technique by enabling this optimization and comparing it with the unoptimized results. In order to ....

V. Zivojnovic, J. M. Velarde, C. Schlager, and H. Meyr. DSPStone - A DSP-oriented Benchmarking Methodology. In International Conference on Signal Processing Applications and Technology (ICSPAT), 1994.

....execute typical applications of digital signal processing. In the area of general purpose processors, compiler technology has reached a high level of maturity. For irregular architectures however, the code quality achieved by traditional highlevel language compilers is often not satisfactory [33, 26]. Generating efficient code for irregular architectures requires highly optimizing techniques that have to be aware of specific hardware features of the target processor. Since such techniques are usually not provided by standard compilers, many digital signal processing applications are developed ....

....algorithms. Since these phases are interdependent, decisions made in one phase impose constraints to the subsequently addressed phases. This can lead to a suboptimal combination of suboptimal partial solutions resulting in a very poor code quality especially for irregular architectures [33]. Search based techniques allow to model the interactions of code generation phases in an exact way. One such technique that additionally supports easy retargetability is integer linear programming [24] The use of integer programming models has increased significantly during the last years ....

[Article contains additional citation context not shown here]

V. Zivojnovic, J.M. Velarde, C. Schlager, and H. Meyr. DSPSTONE: A DSP-Oriented Benchmarking Methodology. In Proceedings of the International Conference on Signal Processing Applications and Technology, 1994. 20

.... more than 30 percent of authors use their own benchmarks, more than 40 of the papers show results on standard benchmarks [Brg93] Popular CAD benchmarks are available for sequential test generation, logic synthesis, physical design, circuit simulation [BBK89, Brg93] and DSP applications [ZMVSM94] Although there are several often cited sets of high level synthesis benchmarks, the 5th order elliptical wave digital filter, by far the most popular benchmark, has been playing a more important role in the development of high level synthesis systems. For instance, a great number of new ....

V. Zivojnovic, J. Martinez Velarde, C. Schlager, and M. Meyr. DSPstone: a DSP-oriented benchmarking methodology. In Proceedings of the 5th International Conference on Signal Processing Applications and Technology, 1994. 20

....programs may have performed well with the contemporary compiler technology, such program tuning frequently makes matters worse for the current generation of optimising compilers. In particular, DSP applications make extensive use of pointer arithmetic as can be seen in the DSPstone Benchmarks [12]. Furthermore in [9] programmers are actively encouraged to use pointer based code in the mistaken belief that the compiler will generate better code. This is precisely analogous to the development of early scientific codes in Fortran where convoluted code was created to cope with the inadequacies ....

Zivojnovic, V., J.M. Velarde, C. Schlager and H. Meyr, DSPstone: A DSP-Oriented Benchmarking Methodology, Proceedings of Signal Processing Applications & Technology, Dallas 1994 .

....Java is an exception in this context, but it would also bene t from knowledge about ecient translation techniques from C to machine languages of embedded processors. of the code quality of available compilers were made in the context of the DSPStone project at the Technical University of Aachen [2]. In this project, manually generated assembly language programs were compared with compiled code. Some of the results are shown in g. 2. Fig. 2. Overhead of compiled code for ADPCM algorithm According to g. 2, data memory overhead for compiled code can almost reach a factor of 5. Even worse, ....

V. Zivojnovic, J. Martinez, C. Schlager, and H. Meyr, \DSPstone: A DSP-oriented benchmarking methodology," Proc. of the Intern. Conf. on Signal Processing and Technology, 1994.

No context found.

V. Zivojnovic, J. Mart inez, C. Schlager, and H. Meyr, "DSPstone: A DSP-oriented benchmarking methodology," in Proc. of ICSPAT'94 - Dallas, Oct. 1994.

No context found.

Zivojnovic, V., J.M. Velarde, C. Schlager and H. Meyr, DSPstone: A DSP-Oriented Benchmarking Methodology, Proceedings of Signal Processing Applications & Technology, Dallas 1994.

No context found.

V. Zivojinovic, J. M. Velarde, C. Schlager, and H. Meyr. DSPStone -- A DSP-oriented Benchmarking methodology. In International Conference on Signal Processing Application Technology, Dallas, TX, pages 715--720, October 1994.

No context found.

V. Zivojnovi'c, J. Martinez, C. Schlager, and H. Meyr, "DSPstone: A DSP-oriented benchmarking methodology," Proceedings of ICSPAT'94, Oct. 1994.

No context found.

Zivojnovic, V., J.M. Velarde, C. Schlager and H. Meyr, DSPstone: A DSP-Oriented Benchmarking Methodology, Proceedings of Signal Processing Applications & Technology, Dallas 1994 .

No context found.

V. Zivojnovic, J. Martinez, C. Schlger, and H. Meyr, "DSPstone: A DSP-oriented benchmarking methodology," in Proc. Int. Conf. Sig. Process. Applicat. Technol., Dallas, TX, 1994.

No context found.

V. Zivojnovic, J. Velarde, C. Schlager, and H. Meyr. DSPSTONE: A DSP-Oriented Benchmarking Methodology. In Proceedings of the International Conference on Signal Processing Applications and Technology, 1994.

No context found.

V. Zivojnovic, J. Velarde, C. Schlager, and H. Meyr, \DSPSTONE: A DSP-Oriented Benchmarking Methodology," in Proceedings of the International Conference on Signal Processing Applications and Technology, 1994.

No context found.

V. Zivojinovic, J. M. Velarde, C. Schlager, H. Meyr, "DSPStone --- A DSP-oriented Benchmarking Methodology," ICSPAT, 1994. 26

No context found.

V. Zivojnovic, J. Velarde, C. Schlager, and H. Meyr. DSPSTONE: A DSP-Oriented Benchmarking Methodology. In Proceedings of the International Conference on Signal Processing Applications and Technology, 1994.

No context found.

V. Zivojnovic et al., "DSPstone: A DSP-oriented benchmarking methodology," in Proc. Int. Conf. on Signal Process. Technol. (ICSPAT), Dallas, Oct. 1994.

No context found.

V. Zivojnovic, J. M. Velarde, and C. Schlager, "DSPstone: A DSP-oriented benchmarking methodology," Internal Rep., Aachen Univ. Technol., Germany, Aug. 1994.

No context found.

V. Zivojnovic, J. Martinez, C. Schlger and H. Meyr, "DSPstone: A DSP-Oriented Benchmarking Methodology", Proceedings of the International Conference on Signal Processing Applications and Technology, Dallas, TX, 1994.

No context found.

V. Zivojnovic, J. Martinez, and H. Meyr. DSPstone: A DSP-oriented Benchmarking Methodology. In the Proceedings of the Intl. Conference on Signal Processing Applications and Technology, Dallas, TX, October 1994.

No context found.

V. Zivojnovic et al., "DSP-Stone: A DSP-oriented benchmarking methodology," in Proc. ICSPAT'94, Dallas, TX, Oct. 1994.

No context found.

V. Zivojnovic, J. Martinez, C. Schlager and H. Meyr, "DSPstone: A DSP-Oriented benchmarking methodology," Proc. Int. Conf. on Signal Proc. Applications and Technology, Oct. 1994.

First 50 documents  Next 50

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC